TSMC Reportedly Speeds Up AP7 and AP8 Build-Outs, Targets Doubling SoIC Capacity

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Despite concerns that TSMC's growing investments in the U.S. might affect its operations in Taiwan, a report from MoneyDJ, citing industry sources, suggests otherwise. Instead of slowing down, TSMC is accelerating the expansion of its advanced packaging capacity within Taiwan. The report highlights that both its AP8 facility in Southern Taiwan Science Park and Chiayi's AP7 site have reportedly moved up their equipment installation schedules.

www.trendforce.com, Mar. 26, 2025 – 

Accelerated Equipment Installation Timeline at AP7 and AP8

At the Chiayi AP7 site, the report notes that equipment installation—originally scheduled for the end of 2025—has been moved forward to August 2025. The priority at this site is to ramp up production of SoIC (System on Integrated Chip) technology, as the report highlights.

Meanwhile, the AP8 facility, which mainly focuses on expanding CoWoS (Chip-on-Wafer-on-Substrate) capacity, is also progressing ahead of schedule, as the report notes. Equipment installation is now expected to begin as early as April 2025, with mass production potentially starting in the second half of the year.

SoIC Capacity Expected to Double

TSMC plans to significantly expand its SoIC capacity. According to the report, the company’s monthly SoIC production was around 4,000–5,000 wafers in 2024. That figure is expected to double to 10,000 wafers in 2025, with the possibility of another doubling in 2026.

Key Customers Driving SoIC Adoption

According to the report, four major companies are currently customers of TSMC’s SoIC technology. AMD was the first to adopt SoIC, while Apple—TSMC’s largest customer—is expected to use the SoIC-mH for its upcoming M5 chips, which offers cost advantages over current solution.

As indicated by Commercial Times, NVIDIA’s next-generation Rubin GPU will also adopt TSMC’s SoIC technology. Broadcom is likewise reported to be among the customers engaged with SoIC, as mentioned by another report from MoneyDJ.

Meanwhile, the P1 facility at Chiayi’s AP7 site is also being developed to support WMCM (Wafer-Level Multi-Chip Module), a hybrid packaging approach that combines InFO and CoWoS technologies. Industry sources believe this technology is likely to be used in future iPhone chip packaging, as noted by MoneyDJ.

TSMC Advancing Silicon Photonics and Co-Packaged Optics (CPO)

TSMC is also advancing silicon photonics and Co-Packaged Optics (CPO) with partners like NVIDIA and Broadcom. According to Economic Daily News, it has integrated CPO with its CoWoS and SoIC platforms and aims to enable 1.6T optical transmission by late 2025, with volume shipments expected in 2026, aligning with NVIDIA’s roadmap.

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