Samsung and TSMC locked in intense 2nm chip competition

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TSMC kicks off 2nm trial production in April while Samsung targets early next year

www.chosun.com, Dec. 16, 2024 – 

Samsung Electronics and Taiwan Semiconductor Manufacturing Company (TSMC) are locked in a fierce competition to secure clients for their upcoming 2-nanometer (nm) foundry processes, both set to enter mass production next year. The transition to 2nm technology introduces a new transistor structure, significantly increasing development and design challenges, with initial yield rates during testing expected to play a pivotal role in shaping market leadership.

TSMC appears to hold the upper hand in development, having announced a detailed test production timeline while aggressively expanding its production capacity. Apple, one of TSMC's largest clients, is widely anticipated to receive the first 2nm chips, with Advanced Micro Devices (AMD) and Nvidia reportedly next in line. Samsung Electronics, meanwhile, has recently begun collaborations with its first 2nm process client. Han Jin-man, who assumed leadership of Samsung's foundry division this year, has vowed to deliver groundbreaking improvements in yield rates.

Industry sources reported on Dec. 16 that TSMC plans to initiate trial production of its 2nm foundry process in April. Through its multi-project wafer (MPW) service, TSMC will allow fabless semiconductor companies to conduct test production of 2nm chips, with full-scale mass production expected in the second half of the year. Many industry experts predict Apple's iPhones will house the first mass-produced 2nm chips. Samsung Electronics has similarly outlined plans to begin test production in the first half of next year, with full mass production targeted for the fourth quarter.

The shift to 2nm technology marks a significant overhaul of transistor structures, resulting in higher development costs and increased design complexity. This process demands precise bonding techniques, improved wafer flatness, and advancements in atomic layer deposition (ALD) technology. Additionally, much of the equipment used for 3nm production must be replaced or reconfigured. TSMC has reportedly set the price of its 2nm wafers at $30,000 per unit, double the cost of its 4nm and 5nm wafers.

TSMC Chairman Mark Liu recently remarked, "Customer demand for 2nm technology has exceeded expectations, surpassing demand for 3nm." Liu added that the company is actively scaling up production capacity. TSMC aims to produce an average of 50,000 wafers per month for its 2nm process, underscoring its ambition to dominate the market early.

Samsung Electronics, determined to recover from setbacks experienced with its 3nm gate-all-around (GAA) process, is focusing on technological innovation and strategic partnerships under Han Jin-man's leadership. Efforts include improving production efficiency and enhancing market positioning to strengthen its foothold in the 2nm race.

In preparation for 2nm production, Samsung began installing equipment at its S3 foundry line in Hwaseong during the fourth quarter of this year. The existing 3nm line, which currently produces around 15,000 12-inch wafers per month, is being converted to accommodate 2nm manufacturing. The company plans to commence test production for key clients in the first quarter of next year.

Earlier this year, Samsung secured a contract to produce 2nm-based artificial intelligence (AI) accelerators for Japan's leading AI startup, Preferred Networks (PFN). Alongside manufacturing the accelerators, Samsung will offer its advanced 2.5D (I-Cube S) packaging technology, which integrates multiple chips into a single package, enhancing transmission speeds while reducing package size. PFN, supported by major investors including Toyota, Nippon Telegraph and Telephone Corporation (NTT), and FANUC, has emerged as a prominent player in Japan's AI landscape.

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