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RISC-V reaches milestone with RVA23 profile ratification
No longer an underdog - it now challenges Arm and x86
theregister.com, Oct. 23, 2024 –
The ratification of the RVA23 profile for RISC-V marks a monumental moment for the architecture, and anyone who's been following RISC-V knows that this isn't just a checkbox.
RVA23 is a long-overdue unification of the instruction set architecture (ISA) that effectively gives RISC-V the structure it needs to compete with giants like Arm and x86 - without the legacy bloat or licensing headaches.
This standard lays out a consistent set of ISA extensions that software developers can rely on across RISC-V hardware, which is no small feat considering RISC-V's open source DNA invites a potentially messy degree of fragmentation.
This is a big deal for RISC-V, but why should you care? Well, if you're a follower of what's happening (or even just a bystander with a slight interest) let's get into it: What the ratification of the RVA23 profile brings to the ecosystem is standardization of ISA across multiple implementations which brings a certain level of consistency that RISC-V has historically lacked: to deliver an ecosystem it requires hardware, software, and everything in between to be compatible with each other.
RVA23 brings features such as vector operations, floating-point and atomic instructions, which are all essential in - sorry here's a buzzword for you - AI. But outside of AI, it also brings capability for machine learning and other elements of high-performance computing which other ISAs bring to the table.
The vector extensions are especially crucial here. Without them, RISC-V would be nowhere in the world of AI, datacenters, or high-performance computing. Much to our delight, it seems as though RISC-V is moving from being a novelty, that different kind of architecture, an underdog, to a real player in parallel workloads that demand serious computational power.
The key here for RISC-V and what RVA23 offers is it eliminates that fragmentation within an ecosystem, where developers can actually develop for an instruction set, and the software itself works seamlessly across the architecture; or that's at least the goal here.
Ratification isn't just about having more instructions to play with; it's about achieving consistency. RVA23 means that whether you're coding for a RISC-V chip in a toaster, a router, or an HPC cluster, you're targeting the same basic set of features. That's how you scale an ecosystem, and it's how you stop developers from thinking such things as: "Hmm, maybe I'll just stick with Arm for now, the ecosystem works, it's easier to work with."