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DeepX Hints At Next-Gen AI Chips
By Sally Ward-Foxton, EETimes (August 30, 2024)
SANTA CLARA, Calif.—DeepX demonstrated its two first-generation chips, which are aimed at different markets, at the Embedded Vision Summit, and gave EE Times some hints on its next-generation chip for AI on-device and in autonomous robots.
Demos
RISC-V IP Cores
The V1 (previously named L1) is an SoC with the DeepX 5-TOPS NPU alongside quad-RISC-V CPUs. It also features a 12-MP image signal processor (ISP). This is a small, sub-$10 SoC for edge devices, built on Samsung 28-nm process technology for power efficiency. DeepX’s V1 demo runs YOLO v7 at 30fps for real-time processing. Its power envelope is 1-2 W.
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