Axiomise Showcases Value of Formal Verification at DVCon Japan and DVCon India

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Aug. 20, 2024 – 

LONDON –– August 20, 2024 –– Axiomise, noted for enabling formal verification adoption through training and services, will exhibit at DVCon Japan, August 29, in Shinagawa Takanawa, and DVCon India in Marathahalli, Bangalore September 18 and 19.

During DVCon India, Dr. Ashish Darbari, founder and CEO of Axiomise, will offer a keynote address titled “The Future is Formal,” describing how formal verification can be used and deployed to make all verification engineers adept in formal. Axiomise is a DVCon India Event Sponsor.

Axiomise, a Silver Sponsor of DVCon Japan, will host a coffee break.

Axiomise will demonstrate at both events formalISA, its automated formal RISC-V app, and showcase its production-grade verification methodology for 32-bit and 64-bit RISC-V processors.

The Axiomise team helps leading names in silicon design with its consulting and services. During both events, members of the Axiomise engineering group will be available to discuss strategies for sign-off to avoid any bugs in post-silicon. “With our unique on-demand and instructor-led training as well as our custom verification IP such as formalISA, we are shaping the industry’s landscape in formal verification for RISC-V and custom silicon design verification,” affirms Darbari.

About Axiomise formalISA

The Axiomise formalISA verification IP app that has verified more than eight different processors including out-of-order superscalar processors creates exhaustive architectural compliance against the RISC-V ISA and verifies micro-architectural implementations through mathematical proofs. It can find a variety of bugs on pre-verified designs, builds exhaustive proofs and offers an extensive coverage metrics dashboard.

Axiomise’s formalISA takes debug to a new level by building an intelligent debugger called i-RADAR that creates debug reports and waveform annotations, automatically saving time in debug handover. In addition to RV32IMC and RV64IMC, formalISA supports Zb* instruction set and integer arithmetic verification.

To arrange a demonstration or private meeting at either DVCon Japan or DVCon India, send email to info@axiomise.com.

Visit formalISA app and its features for more details. Online product demos can be viewed at the formalISA studio. For talks and videos on application of the formalISA app and its background technology, go to RISC-V studio.

About Axiomise

Axiomise is accelerating formal verification adoption through its unique combination of training, consulting, services and specialized verification solutions for RISC-V. Axiomise was founded by Dr. Ashish Darbari, FBCS, FIETE, DPhil (Oxford), who has been a formal verification practitioner for more than two decades with 65 patents in formal verification and more than 70 publications.

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