Company
design-reuse.com
D&R China
D&R Events
Videos
Sign In

www.design-reuse-embedded.com
SEARCH IP   
    • Categories
    • RISC-V
    • Embedded Processing
    • 5G, 3GPP LTE IP
    • IoT IP
    • Artificial Intelligence IP
    • Automotive IP
    • Space and Avionics
    • Security IP
    • Audio & Video IP
    • Design Platforms
    • Monitoring and Verification
    • SoC Design Services
    • Find your best SoC design partner
Partner Videos D&R Events
    • IP-SoC Days 2025
    • IP-SoC Days 2024
    • IP-SoC Days 2023
    • IP-SoC Days 2022
    • IP-SoC Days 2021
    • IP-SoC 2024
    • IP-SoC 2023
    • IP-SoC 2022
    • IP-SoC 2021
NEWS

IP SoC EU 24 - Dec. 10-11, 2024

Design And Reuse
Design And Reuse
IP SoC Community: EU as a main player ?
Gabrièle Saucier, CEO, Design And Reuse
Ericsson
Ericsson
The network evolution and radio implications
Fredrik Tillman, Head of Integrated Radio Systems, Ericsson
CEA
CEA
Chips Act and EU design Platform
Olivier Thomas, CEA
Rambus, Inc.
Rambus, Inc.
The Critical Role of PCIe 7.0 & CXL 3.1 Solutions in Enabling AI applications
Bart Stevens, Senior Director of Product Marketing, Rambus, Inc.
Dolphin Semiconductor
Dolphin Semiconductor
How to select the best Audio codec architecture to enhance your wearables?
Etienne Faucher, Product Marketing Manager, Dolphin Semiconductor
Dolphin Semiconductor
Dolphin Semiconductor
Interview with Hakim Jaafar - VP Marketing - Dolphin Semiconductor
NTLab
NTLab
Wireless and Batteryless Interface for IoT
Polina Proskurova, Project Manager, NTLab
Soitec
Soitec
Driving Sustainability in Automotive Electronics; Innovating for a Greener Future
Philippe Flatresse, Product Marketing, Soitec
Synopsys, Inc.
Synopsys, Inc.
Silicon Lifecycle Management (SLM) in context of Chiplets for Automotive
Graham Woods, Principal Product Manager, Synopsys, Inc.
Synopsys, Inc.
Synopsys, Inc.
Interview with Graham Woods - Principal Product Manager - Synopsys, Inc.
Rambus, Inc.
Rambus, Inc.
Protecting Automotive Networks with MACsec Security
Bart Stevens, Senior Director of Product Marketing, Rambus, Inc.
Kudelski IoT
Kudelski IoT
Cyber Resilience and Safety in Automotive: How Security IP Provides Essential Primitives for Compliance
Gordon Fairley, Kudelski IoT
Kudelski IoT
Kudelski IoT
Interview with Gordon Fairley - Kudelski IoT
Secure-IC
Secure-IC
Secure-IC Differential Loop PUF : Overcoming some weaknesses of the traditional Loop PUF while enhancing its usability
Brice GAIGNOUX, Pre-Sales Engineer EMEA, Secure-IC
CHERI Alliance
CHERI Alliance
The CHERI Alliance - getting security embedded into electronic systems
Mike Eftimakis, Founding Director, CHERI Alliance
Synopsys, Inc.
Synopsys, Inc.
Integrated Security Solutions: How SRAM-based PUF Augments Embedded Hardware Secure Modules in a Post-Quantum World
Erik van der Sluis, Principal R&D Engineer, Synopsys, Inc.
AEDVICES CONSULTING
AEDVICES CONSULTING
Security Verification in SoCs
Ali Hmedat, Senior Design vérification Engineer, AEDVICES CONSULTING
CAST, Inc.
CAST, Inc.
Interview with Dr. Calliope-Louisa Sotiropoulou - CAST, Inc.
Design And Reuse
Design And Reuse
6R Greenness Profiling for IC and Boards
Gabrièle Saucier, CEO, Design And Reuse
UCLouvain
UCLouvain
Strategic decision-making in the semiconductor sector: shifting from relative to absolute sustainability
Thibault Pirson, PhD, research assistant, UCLouvain
Dolphin Semiconductor
Dolphin Semiconductor
How to Enhance Energy Efficiency and Reduce Costs with Advanced In-Situ Sensors?
Vincent Telandro, Product Marketing Manager, Dolphin Semiconductor
STMicroelectronics
STMicroelectronics
Standardizing CDC and RDC abstract models
Jean-Christophe Brignone, SMTS, STMicroelectronics
STMicroelectronics
STMicroelectronics
Interview with Jean-Christophe Brignone - SMTS - STMicroelectronics
Racyics GmbH
Racyics GmbH
Make Chip: the one and only turnkey 22FDX design environment
Patrick Döll, Physical IC Design Engineer, Racyics GmbH
Racyics GmbH
Racyics GmbH
Interview with Patrick Döll - Physical IC Design Engineer - Racyics GmbH
Keysom
Keysom
Keysom Studio - Design Space Exploration of processor architectures
Luca TESTA, Cofounder & COO, Keysom
Keysom
Keysom
Interview with Luca TESTA - Cofounder & COO - Keysom
STMicroelectronics
STMicroelectronics
Standard EDA tools based asynchronous design flow
GODARD Adrien, PhD student, STMicroelectronics
SmartDV Technologies
SmartDV Technologies
Porting ASIC IP Cores to FPGA: It's Not a Cakewalk!
Philipp Jacobsohn, Principal Application Engineer, SmartDV Technologies
SmartDV Technologies
SmartDV Technologies
Interview with Ettore Antonino Giliberti - Senior Staff Application Engineer - SmartDV Technologies
HCL TECH
HCL TECH
Niche gets super niche in the SEMI conductor Equipment domain
P SRINIVASA RAGHAVAN, Practice Head, Semiconductor BU, HCL TECH
STMicroelectronics
STMicroelectronics
Solidify the European FDSOI ecosystem and accelerating its industrial deployment; A Chips JU initiative
Martin LABRUNE, European & France Public Affairs, STMicroelectronics
Soitec
Soitec
Designing Intelligence from our SOIL
Krishna Pradeep, Soitec
Fraunhofer
Fraunhofer
Innovating the Future with SOIL: Next-Gen IPs, Transfer from Research to Silicon
Damian Panter, Fraunhofer
AED Vantage GmbH
AED Vantage GmbH
From silicon to the use cases, SOIL as a test bench for automotive applications
Leonardo Govoni, AED Vantage GmbH
Design And Reuse
Design And Reuse
Market Available FDSOI IP
Dagmara Zielinska, Partnership Program Manager, Design And Reuse
Racyics GmbH
Racyics GmbH
Designing SOC with ABX® - Challenges and Solutions
Florian Bilstein, Director Design Service, Racyics GmbH

IP SoC Japan 24 - Sep. 17, 2024

Xiphera Ltd
Xiphera Ltd
Interview with Dr. Matti Tommiska - Xiphera Ltd
Key ASIC
Key ASIC
Interview with Long Liu - Account Manager - Key ASIC
Design And Reuse
Design And Reuse
Welcome to the IP-SoC community
Gabrièle Saucier, CEO, Design And Reuse
CM Engineering Labs Singapore Pte. Ltd
CM Engineering Labs Singapore Pte. Ltd
High-performance PLL frequency synthesizers for wireless and wireline communications
M. Annamalai Arasu, Director, R&D, CM Engineering Labs Singapore Pte. Ltd
Floadia Corporation
Floadia Corporation
The Uniquely Suitable eNVM Ip for Auto Grade MCU from Floadia
Yasuhiro Taniguchi, CTO and COO, Floadia Corporation
Mobiveil Inc.
Mobiveil Inc.
Semiconductor IPs for Memory, Flash storage and wireless applications
Ravi Thummarukudy, CEO, Mobiveil Inc.
Silicon Library Inc.
Silicon Library Inc.
High Speed Interface, keys and Trend
Junzoh Shimizu, CEO & President, Silicon Library Inc.
Synopsys, Inc.
Synopsys, Inc.
Scaling Hyperscale Data Centers for AI Workloads with High-Speed Interface IP
Hiroyuki Hasegawa, Application Engineering Manager, Synopsys, Inc.
Synopsys, Inc.
Synopsys, Inc.
The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases
Yuya Suzuki, Applications Engineering, Staff Engineer, Synopsys, Inc.
Mirabilis Design Inc.
Mirabilis Design Inc.
Architecture challenges in meeting power, thermal and performance needs in partitioning Chiplets for rapid deployment
Deepak Shankar and Shuzo Tanaka, Founder, Mirabilis Design Inc.
Curious Corp.
Curious Corp.
Curious’ latest High Performance IP Introduction
Ken ichi Shimomura, Director of Design department, Curious Corp.
Menta
Menta
Embedded Programmable Logic - A risk insurance for your next chip design
Yoan Dupret, Menta
Rambus, Inc.
Rambus, Inc.
Meeting the Needs of AI Training with HBM3E
Motoyasu Kobayashi, Director of Sales, Rambus, Inc.
AiM Future, Inc.
AiM Future, Inc.
Scalable, Flexible Edge AI accelerator: Silicon-Proven IP for Consumer Electronics
ChangSoo Kim, CEO, AiM Future, Inc.
Verisilicon
Verisilicon
Enabling Multimodal AI on Edge Devices
Shanghung Lin, VP, Vision and Image Product, Verisilicon
Rambus, Inc.
Rambus, Inc.
Quantum Safe Cryptography: Protecting Devices and Data in the Quantum Era
Toru Furukawa, Senior Field Application Engineer, Rambus, Inc.
Xiphera Ltd
Xiphera Ltd
Future-Proof Your Design with Hardware-Based Post-Quantum Cryptographic IP Cores
Dr. Matti Tommiska, Xiphera Ltd
Secure-IC
Secure-IC
Security From Chip-To-Cloud with PQC (Post Quantum Cryptography)
Ahmed BOUGRIANE, Pre-Sales Engineer North Asia, Secure-IC
Siliconally GmbH
Siliconally GmbH
How SafeIP(TM) enables fail operational vehicles, robotics and drones
Benjamin Weinhardt, Head of Business & Collaboration, Siliconally GmbH
Allegro DVT
Allegro DVT
Video Codecs Landscape and Challenges Ahead
Yujing Wei, VP, APAC Business Development, Allegro DVT

IP SoC China 24 - Sep. 12, 2024

Design And Reuse
Design And Reuse
Welcome to the IP SoC community
Gabrièle Saucier, CEO, Design And Reuse
Innosilicon
Innosilicon
From design to mass production, a one-stop IP and customization service platform for LLM system
Louis Li, Vice President of FAE, Innosilicon
CAST, Inc.
CAST, Inc.
The Advantages of Using HW Stacks in Your Design
Dr. Calliope-Louisa Sotiropoulou, Sales Engineer, CAST, Inc.
Siemens
Siemens
Kalray optimizes complex software with Tessent Enhanced Trace Encoder
Yifan Li, Tessent Account Technology Manager, Siemens
Synopsys, Inc.
Synopsys, Inc.
The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases
Alex Yu, Solutions Engineering, Sr Manager, Synopsys, Inc.
ViShare Technology Ltd.
ViShare Technology Ltd.
RISC-V Architecture Fusing Custom-Accelerator-As-Software
Ronald Hui, CTO, ViShare Technology Ltd.
Think Silicon S.A.
Think Silicon S.A.
NEOX | GA100: Industry first RISC-V GPGPU for the MCU market
Xianggang Kong, Director of Business Development, Think Silicon S.A.
Sifive, Inc.
Sifive, Inc.
Demonstrating RISC-V Value in Fast Growing AI market
Rocky Zhang, Principal Field Application Engineer, Sifive, Inc.
Mobiveil Inc.
Mobiveil Inc.
Semiconductor IPs for Memory, Flash storage and wireless applications
Ravi Thummarukudy, CEO, Mobiveil Inc.
OPENEDGES Technology, Inc.
OPENEDGES Technology, Inc.
LPDDR Support on Mature Technology Nodes
Minlin Fan, OPENEDGES Technology, Inc.
AkroStar
AkroStar
Interface IP: The Key Force Accelerating AI Chip Innovation and Performance Leap
Wang Shang-Yuan, Director of Product Marketing, AkroStar
Synopsys, Inc.
Synopsys, Inc.
Interoperable SoC Framework to Overcome PCIe Design Verification Challenges
Queena Liu, Applications Engineering, Staff Engineer, Synopsys, Inc.
NTLab
NTLab
Wireless and Batteryless Interface for IoT
Alexander Kovalevsky, Chief Technical Officer, NTLab
SSIPEX
SSIPEX
IP Challenges in AI era
Dr. Bulu Xu, Vice Director, SSIPEX
AiM Future, Inc.
AiM Future, Inc.
Scalable, Flexible Edge AI accelerator: Silicon-Proven IP for Consumer Electronics
ChangSoo Kim, CEO, AiM Future, Inc.
Rambus, Inc.
Rambus, Inc.
Meeting the Needs of AI Training with HBM3E
Kai Zhao, Senior Principal Engineer in Field Application Engineering, Rambus, Inc.
Synopsys, Inc.
Synopsys, Inc.
Automotive HSM - Solve the ISO/SAE 21434 Cybersecurity Challenge & Set the Stage for Quantum Safety
Yaqiang Pei, Senior Staff Application Engineer, Synopsys, Inc.
Rambus, Inc.
Rambus, Inc.
Quantum Safe Cryptography: Protecting Devices and Data in the Quantum Era
Kevin Zhang, SPE FAE, Rambus, Rambus, Inc.
Secure-IC
Secure-IC
Security From Chip-To-Cloud with PQC (Post Quantum Cryptography)
Shengnan WANG, General Manager China, Secure-IC
Allegro DVT
Allegro DVT
Versatile Video Coding (VVC) Codec Update and Market Adoption
Yujing Wei, VP, APAC Business Development, Allegro DVT
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Advanced AI-Driven Image Signal Processing for Next-Gen Camera
Fangbing Yue, Director of ISP IP, VeriSilicon Microelectronics (Shanghai) Co., Ltd.

IP SoC South Korea 24 - Sep. 9, 2024

KSIA
KSIA
Interview with Jinsook Ban - Project Manager - KSIA
Design And Reuse
Design And Reuse
Welcome to IP-SoC Community
Gabrièle Saucier, CEO, Design And Reuse
LeoLSI
LeoLSI
Analog IP Solution for SAMSUNG Foundry
Myeon-Lyong Ko, R&D Center Director, LeoLSI
Analog Bits Inc.
Analog Bits Inc.
Interview with Mahesh Tirupattur - Executive Vice President - Analog Bits Inc.
Analog Bits Inc.
Analog Bits Inc.
Power Management Sensor IP’s for FinFet and GAA processes
Mahesh Tirupattur, Executive Vice President, Analog Bits Inc.
OPENEDGES Technology, Inc.
OPENEDGES Technology, Inc.
LPDDR Support on Mature Technology Nodes
Dave DongHun Kim, Senior Manager, FAE, OPENEDGES Technology, Inc.
Siemens
Siemens
Leveraging the RISC-V Efficient Trace (E-Trace) Standard
Soo Yong Lee, Account Technology Manager, Siemens
Imagination Technologies Group Ltd.
Imagination Technologies Group Ltd.
Imagination APXM-6200 CPU: Performance meets Trust in RISC-V
JongChan (Brian) Mun, Senior Sales Director, Imagination Technologies Group Ltd.
AiM Future, Inc.
AiM Future, Inc.
Scalable, Flexible Edge AI accelerator: Silicon-Proven IP for Consumer Electronics
Kwak Jaehwa, CTO, AiM Future, Inc.
Rambus, Inc.
Rambus, Inc.
Meeting the Needs of AI Training with HBM3E
Suk Keun Youn, Director of Sales, Rambus, Inc.
Imagination Technologies Group Ltd.
Imagination Technologies Group Ltd.
AI on RISC-V
Hojung Han, Staff Applications Engineer, Imagination Technologies Group Ltd.
BTREE Co. Ltd.
BTREE Co. Ltd.
Future of ISP ( Camera ISP & Display ISP )
Daeha Kook, Director, BTREE Co. Ltd.
BLUEDOT
BLUEDOT
AI-based video pre-processor to reduce the storage cost and network traffic for video applications
Hyung-Seok Han, Director of Marketing, BLUEDOT
Rambus, Inc.
Rambus, Inc.
Quantum Safe Cryptography: Protecting Devices and Data in the Quantum Era
Jihan Moon, Senior Principal Engineer in Field Application Engineering, Rambus, Inc.
ICTK
ICTK
PUF based Root of Trust for Emerging Post Quantum Cryptography
Duhyun Jeon, Senior Engineer, ICTK
Secure-IC
Secure-IC
AI-powered cybersecurity: Securyzr™ Intrusion Detection System (IDS)​
Ahmed BOUGRIANE, Pre-Sales Engineer North Asia, Secure-IC
Siliconally GmbH
Siliconally GmbH
How SafeIP(TM) enables fail operational vehicles, robotics and drones
Diana Strohbach, Head of Marketing & Collaboration, Siliconally GmbH
Synopsys, Inc.
Synopsys, Inc.
The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases
Sangmin Lee, Project/Program Manager EDA Group, Synopsys, Inc.
CAST, Inc.
CAST, Inc.
The Advantages of Using HW Stacks in Your Design
Dr. Calliope-Louisa Sotiropoulou, Sales Engineer, CAST, Inc.

IP SoC Silicon Valley 24 - Apr. 25, 2024

Alphawave Semi
Alphawave Semi
Interview with Michael Klempa - Product Marketing Specialist - Alphawave Semi
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Interview with Pulin Desai - Cadence Design Systems, Inc.
Quadric
Quadric
Interview with Steve Roddy - CMO - Quadric
Rambus, Inc.
Rambus, Inc.
Interview with Adiel Bahrouch - Director of Business Development - Rambus, Inc.
Synopsys, Inc.
Synopsys, Inc.
Interview with John Swanson - Senior Product Line Manager - Synopsys, Inc.
Kudelski IoT
Kudelski IoT
Interview with Lamyae Lahlou - Product Manager - Kudelski IoT
Silicon Creations
Silicon Creations
Interview with Randy Caplan - VP/Co-Founder - Silicon Creations
Innosilicon
Innosilicon
Interview with Farzad Zarrinfar - Innosilicon
Sofics
Sofics
Interview with Bart Keppens - Chief Business Development - Sofics
Mixel, Inc.
Mixel, Inc.
Interview with Justin Endo - Marketing & Sales - Mixel, Inc.
Siemens EDA
Siemens EDA
Interview with Geir Eide - Director, Product Management - Siemens EDA
Flex Logix Technologies, Inc.
Flex Logix Technologies, Inc.
Interview with Jayson Bethurem - VP Marketing - Flex Logix Technologies, Inc.
Mobiveil Inc.
Mobiveil Inc.
Interview with Ravi Thummarukudy - Mobiveil Inc.
Analog Bits Inc.
Analog Bits Inc.
Interview with Mahesh Tirupattur - Analog Bits Inc.
Design And Reuse
Design And Reuse
IP providers: the "Human" Intelligence in the semi conductor world
Gabrièle Saucier, CEO, Design And Reuse
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Implementing Transformer Neural Networks for Visual Perception on Embedded Devices
Shang-Hung Lin, PhD, VP of Neural Processing Products (NPU), VeriSilicon Microelectronics (Shanghai) Co., Ltd.
BrainChip Inc.
BrainChip Inc.
Neuromorphic Processor IP for a New Generation of SoCs featuring Temporal Event-based Neural Networks (TENNs)
Steve Thorne, Vice President of Sales, BrainChip Inc.
Rambus, Inc.
Rambus, Inc.
Meeting the Needs of AI Training with HBM3E
Johnny Kim, Senior Principal Engineer, Rambus, Inc.
Synopsys, Inc.
Synopsys, Inc.
How IP will Enable Low-Power AI
Ron Lowman, Strategic Marketing Manager, Synopsys, Inc.
Alphawave Semi
Alphawave Semi
Advancing AI Connectivity through Linear Pluggable Optics Driven by High Performance SerDes
Michael Klempa, Product Marketing Specialist, Alphawave Semi
PrimisAI
PrimisAI
How Gen-AI will reshape the world of semiconductor IP
Hans Bouwmeester, VP Sales, PrimisAI
Cyient Inc
Cyient Inc
Shooting through the Semiconductor Datasheets - Generative AI
Eklovya Sharma, Director of Sales, Cyient Inc
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Addressing Tomorrow's Automotive Compute Needs with Cadence
Pulin Desai, Cadence Design Systems, Inc.
Quadric
Quadric
Overview of the Quadric GPNPU (general purpose NPU)
Steve Roddy, CMO, Quadric
Synopsys, Inc.
Synopsys, Inc.
Accelerating RISC-V Innovation in Automotive, AIoT & Consumer Markets
Rich Collins, Director of Product Management, Synopsys, Inc.
Chips&Media, Inc.
Chips&Media, Inc.
Video IP's Role in Multimedia Application and Use-cases
Andy Lee, Vice President, US Marketing, Chips&Media, Inc.
Rambus, Inc.
Rambus, Inc.
Quantum Safe Cryptography: Protecting Devices and Data in the Quantum Era 
Adiel Bahrouch, Director of Business Development, Rambus, Inc.
Secure-IC
Secure-IC
AI-powered cybersecurity: Securyzr™ Intrusion Detection System (IDS)
Yathiendra Vunnam, Field Application Engineer, Secure-IC
Synopsys, Inc.
Synopsys, Inc.
Addressing High-Performance Data Center Bandwidth & Security Challenges
John Swanson, Senior Product Line Manager, Synopsys, Inc.
Kudelski IoT
Kudelski IoT
Embracing Security: A Comprehensive 360-Degree Approach
Lamyae Lahlou, Product Manager, Kudelski IoT
Synopsys, Inc.
Synopsys, Inc.
UCIe Progress Report: Big Enhancements, IP Maturity, and Ecosystem Interoperability
Manmeet Walia, Sr. Director, Product Management, Synopsys, Inc.
YorChip
YorChip
Mixed Chiplet systems with wide range of nodes is becoming real
Kash Johal, CEO, YorChip
Analog Bits Inc.
Analog Bits Inc.
On-Die Power Management for SoCs and Chiplets
Rounak Lokare, Senior Circuit Design Engineer, Analog Bits Inc.
Silicon Creations
Silicon Creations
Optimized clocking solutions for high performance die-to-die interfaces
Blake Gray, Director of Hardware Engineering, Silicon Creations
Alphawave Semi
Alphawave Semi
AI System Connectivity for UCIe and Chiplet Interfaces Demand Escalating Bandwidth Needs
Letizia Giuliano, VP, IP Product Marketing & Management, Alphawave Semi
Innosilicon
Innosilicon
High Performance UCIe Chiplet and Memory Subsystems IPs Optimized to Turbo Charge Next Gen AI SOC (Covering Chiplet/GDDR7/LPDDR5X/HBM3E up to 3nm)
Gordon Ao, CEO, Innosilicon
Arteris IP
Arteris IP
Implementing Safe Coherent Networks-on-Chips for Automotive ADAS Applications
Guillaume Boillet, Sr. Director Strategic Marketing, Arteris IP
Sofics
Sofics
Smallest, ultra-low leakage, ultra-low capacitance ESD protection
Bart Keppens, Chief Business Development, Sofics
Mixel, Inc.
Mixel, Inc.
MIPI CSI-2 in Low-Power Image Sensors for Industrial and Consumer IoT Applications
Justin Susumu Endo,Brian Lenkowski, Marketing & Sales,Director Product Management - Consumer CMOS Image Sensors, Mixel, Inc.
Synopsys, Inc.
Synopsys, Inc.
The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases
Ash Patel, Director of Product Management, Synopsys, Inc.
Siemens EDA
Siemens EDA
Boost SoC debug with smart monitors and embedded software
Geir Eide, Director, Product Management, Siemens EDA
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Systematic Verification Framework for Memory Subsystem Ensuring Reliability and Robustness
Pratibha Sukhija,Dinesha Rao, Senior Product Management and Marketing Manager,Senior Architect, Cadence Design Systems, Inc.
Agnisys, Inc.
Agnisys, Inc.
Automatic generation of Device Driver and Programmer's Reference Manual from PSS
Freddy Nunez, Application Engineer, Agnisys, Inc.
Flex Logix Technologies, Inc.
Flex Logix Technologies, Inc.
Elevate your SoC - Customer eFPGA Use Cases for Adding Adaptability and Acceleration
Jayson Bethurem, VP Marketing, Flex Logix Technologies, Inc.
LeWiz Communications, Inc.
LeWiz Communications, Inc.
Drive and Fly with Time Critical Networking and Embedded FPGA
Chinh Le, LeWiz Communications, Inc.

IP SoC Conference 23 - Dec. 4-5, 2023

D&R
D&R
Welcome : Innovation in semi conductor industry
Gabrièle Saucier, CEO, D&R
Arm Ltd.
Arm Ltd.
Empowering Innovation in the Age of Custom Silicon
Eric Lalardie, Director, Arm Ltd.
Arm Ltd.
Arm Ltd.
Eric Lalardie - Director - Arm Ltd.
SOITEC
SOITEC
Greening the Road Ahead: Revolutionizing the Automotive Industry with FD SOI Technology
Philippe Flatresse, Product Marketing, SOITEC
SOITEC
SOITEC
Technologies enabling future mobile connectivity & sensing
Francois Brunier, Partnership Program Manager, SOITEC
CEA
CEA
Digital Beamforming design in mmW: A 22nm FDSOI transceiver practical case
Jérôme Prouvée, Layout Engineer & Project Manager, CEA
Rambus, Inc.
Rambus, Inc.
Meeting the Needs of AI Training with HBM3
Philip Van Den Heuvel, Regional Sales Manager, Rambus, Inc.
Arm Ltd.
Arm Ltd.
Innovative Integrated IP SoC Design for Edge AI
Tim Menasveta, Director of IoT Product Management, Arm Ltd.
Dolphin Design
Dolphin Design
Transforming Far-Edge Computer Vision with Energy-Efficient A
Vincent Huard, Chief Technology Officer, Dolphin Design
CAST, Inc.
CAST, Inc.
The Lossless Compression Challenge: from Networking to Data centers
Dr. Calliope-Louisa Sotiropoulou, Sales Engineer, CAST, Inc.
CAST, Inc.
CAST, Inc.
Dr. Calliope-Louisa Sotiropoulou - Sales Engineer - CAST, Inc.
Alphawave Semi
Alphawave Semi
Addressing connectivity scalability in the AI world with Mulit-Standard IO Chiplets driving next generation interconnects
Michael Klempa, Product Marking Specialist, Alphawave Semi
Alphawave Semi
Alphawave Semi
Michael Klempa - Product Marking Specialist - Alphawave Semi
SmartDV Technologies
SmartDV Technologies
IP Core Considerations for Ensuring Functional Safety in Safety-Critical Applications
Philipp Jacobsohn, Senior Staff Applications Engineer, SmartDV Technologies
SmartDV Technologies
SmartDV Technologies
Philipp Jacobsohn - Senior Staff Applications Engineer - SmartDV Technologies
Frontgrade Gaisler
Frontgrade Gaisler
GRLIB: VHDL IP library for fault-tolerant SoC
Fabio Malatesta, Product Marketing Engineer, Frontgrade Gaisler
Frontgrade Gaisler
Frontgrade Gaisler
Fabio Malatesta - Product Marketing Engineer - Frontgrade Gaisler
Digital Core Design
Digital Core Design
CAN XL - can safety go in hand with performance?
Jacek Hanke, CEO, Digital Core Design
Digital Core Design
Digital Core Design
Jacek Hanke - CEO - Digital Core Design
Synopsys, Inc.
Synopsys, Inc.
Solve the Latest ISO 21434 Cybersecurity Challenge with an Automotive HSM
Ruud Derwig, Senior Staff Engineer for Security IP, Synopsys, Inc.
Tiempo Secure
Tiempo Secure
Which IP for Which Security Certification Standard,
Ludovic Merrien, Security Certification Leader, Tiempo Secure
Tiempo Secure
Tiempo Secure
Serge Maginot - CEO - Tiempo Secure
Secantec, Inc.
Secantec, Inc.
LDPC Encoder/Decoder
Manish Mahajan, Founder, Secantec, Inc.
Secure-IC
Secure-IC
Security from chip to cloud with PQC (Post-Quantum Cryptography)
Brice Gaignoux, EMEA Pre-Sales Engineer, Secure-IC
Rambus, Inc.
Rambus, Inc.
Quantum Safe Cryptography: Protecting Devices and Data in the Quantum Era
Bart Stevens, Senior Director of Product Marketing, Rambus, Inc.
Rambus, Inc.
Rambus, Inc.
Bart Stevens - Senior Director of Product Marketing - Rambus, Inc.
PQShield
PQShield
How will platform and communication security evolve in the quantum computing era?
Graeme Hickey, VP Engineering, PQShield
PQShield
PQShield
Graeme Hickey - VP Engineering - PQShield
Codasip GmbH
Codasip GmbH
Beyond one-size-fits-all: The power of tailored CPUs
Mike Eftimakis, VP Strategy & Ecosystem, Codasip GmbH
D&R
D&R
Survey of market available processor IP
Dagmara Zielinska,Gabrièle Saucier, Partnership Program Manager,CEO, D&R
Dolphin Design
Dolphin Design
Adaptive Voltage Scaling (AVS): Enhancing Chip Efficiency
Vincent Telandro, Product Marketing manager (Power Management IP), Dolphin Design
Thalia
Thalia
Technology Analysis: what you need to know before embarking on analog design migration
Jean-François Lambert, Director of Business Development, Thalia
Tessolve Semiconductor Private Limited
Tessolve Semiconductor Private Limited
Hybrid Cloud Management for IP Development
Sundar M,Pitchumani Guruswamy, Director, Tessolve Semiconductor Private Limited
Innova Advanced Technologies
Innova Advanced Technologies
A novel approach for SoC design resource management and prediction
Chouki Aktouf, Co-Founder, Innova Advanced Technologies
Innova Advanced Technologies
Innova Advanced Technologies
Chouki Aktouf - Co-Founder - Innova Advanced Technologies
CetraC
CetraC
Multi-IO co-processor with TSN
Vincent Laporte, CTO - V.P. BU, CetraC
Siemens Digital Industries Software
Siemens Digital Industries Software
IP QA Best Practices
Lionel Couder, Sr. Applications Engineer, Siemens Digital Industries Software
Siemens Digital Industries Software
Siemens Digital Industries Software
Wei-Lii Tan - Principal Product Manager for Solido Intelligent Custom IC Verification - Siemens Digital Industries Software
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Important Considerations for Verification of CXL Devices
Nicolas Dai, Application Engineer Architect, Cadence Design Systems, Inc.
NTLab
NTLab
Chip Condition Monitoring and Performance Optimization. Process/Voltage/Temperature Detectors in ASIC Design Methodology.
Vsevolod Sergeenko, RFID Team Leader, NTLab
NTLab
NTLab
Alexander Kovalevsky - Principal Engineer - NTLab
Synopsys, Inc.
Synopsys, Inc.
The Critical Role of Embedded Monitor IP in Enabling Silicon Lifecycle Management Use Cases
Dan Alexandrescu, R&D Engineer, Synopsys, Inc.
Andes Technology Corp.
Andes Technology Corp.
Vince Wu - Sales Manager and Niraj Dengale - Senior Engineer - Andes Technology Corp.

IP SoC China 23 - Sep. 6, 2023

Design And Reuse
Design And Reuse
Welcome to the IP soc community
Gabrièle Saucier, CEO & Founder, Design And Reuse
Shanghai Silicon Intellectual Property Exchange
Shanghai Silicon Intellectual Property Exchange
The Current Situation of China's Integrated Circuit Industry and the Trend of IP Core Business
Bulu Xu,Tian-Shen Tang, Vice Director,General Consultant, Shanghai Silicon Intellectual Property Exchange
Alphawave Semi
Alphawave Semi
Chiplet and Die-to-Die (D2D) Interface Interoperability - How to Accelerate the Path to an Open Ecosystem
David Kuo, Technical Solutions Manager, Alphawave Semi
Synopsys, Inc.
Synopsys, Inc.
The Future of UCIe for Multi-Die Systems
Roy Geng, Staff Application Engineer, Synopsys, Inc.
SiFive Inc.
SiFive Inc.
It just keeps getting better: RISC-V Performance
Rocky Zhang, Principal Field Application Engineer, SiFive, SiFive Inc.
CloudBEAR
CloudBEAR
RISC-V processor IP product line
Alexander Kozlov, CTO, CloudBEAR
Shanghai Silicon Intellectual Property Exchange
Shanghai Silicon Intellectual Property Exchange
A unified hyper heterogeneous parallel computing ecosystem
Wenke Zhao, HSA BU G.M, Shanghai Silicon Intellectual Property Exchange
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Bring High Quality Image to Smart Display with Super Resolution
Eric Mao, Sr. Director of Machine Learning Software, VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Rambus, Inc.
Rambus, Inc.
Leveraging VESA Video Compression & MIPI DSI-2 for High-Performance Displays
Larry Lai, SMTS Field Applications Engineering, Rambus, Inc.
Dolphin Design
Dolphin Design
WhisperExtractor: Enabling μW Voice AI for Always-On Applications
Lida CAI, China FAE Manager, Dolphin Design
Skymizer Inc.
Skymizer Inc.
Neural-network Processing Unit hardware-software co-design IP
Luba Tang, CEO, Skymizer Inc.
Mobiveil Inc.
Mobiveil Inc.
Stay Ahead of the Curve with Mobiveil's Memory, Storage and 5G IP Solutions
Ravi Thummarukudy, CEO, Mobiveil Inc.
OPENEDGES Technology, Inc.
OPENEDGES Technology, Inc.
LPDDR5/DDR5 Design Challenges & The Need for Flexibility
Richard Fung, CEO of The Six Semiconductor, OPENEDGES Technology, Inc.
Synopsys, Inc.
Synopsys, Inc.
PCIe 6.0 and CXL 3.0 Applications and Solutions
Leon Zhang, Senior Product Management Manager, Synopsys, Inc.
Siemens - Tessent Embedded Analytics
Siemens - Tessent Embedded Analytics
Removing the Risk from RISC-V using the RISC-V Trace Standard
Yifan Li, Siemens - Tessent Embedded Analytics
Synopsys, Inc.
Synopsys, Inc.
Essential IP for the Enablement of Silicon Lifecycle Management
Alex Yu, Sr Mgr, Solutions, EDAG, HW Analytics & Test, Synopsys, Inc.
Thalia
Thalia
Second Source Management - the solution to securing product delivery
Fionn Liu, Thalia
Secure-IC
Secure-IC
Cyber-physical security from chip to cloud with PQC (Post-Quantum Cryptography)
Shengnan Wang, General Manager China, Secure-IC
Shanghai Silicon Intellectual Property Exchange
Shanghai Silicon Intellectual Property Exchange
Interview with Tian-Shen Tang - CEO at IC Spaces - Shanghai Silicon Intellectual Property Exchange
AkroStar Technology Co., Ltd.
AkroStar Technology Co., Ltd.
Interview with Thomas Huang - Product Marketing Director - AkroStar Technology Co., Ltd.
CloudBEAR
CloudBEAR
Interview with Alexander Kozlov - CTO - CloudBEAR
OPENEDGES Technology, Inc.
OPENEDGES Technology, Inc.
Interview with Richard Fung - CEO of The Six Semiconductor - OPENEDGES Technology, Inc.
SmartDV Technologies
SmartDV Technologies
Interview with Karthik Goal - General Manager Asia at SmartDV Technologies
Silvaco, Inc.
Silvaco, Inc.
Interview with Ellison Zhao - General Manager China at Silvaco, Inc.

IP SoC Silicon Valley 23 - Apr. 24, 2023

Design and Reuse
Design and Reuse
Welcome to D&R IP SOC community
Gabrièle Saucier, CEO, Design and Reuse
CMC Microsystems
CMC Microsystems
Accelerating Innovation with Open Hardware
Gordon Harling, CEO, CMC Microsystems
CMC Microsystems
CMC Microsystems
Interview with Gordon Harling - CEO - CMC Microsystems
Perceptia Devices
Perceptia Devices
Integrating RF PLLs into Complex SoC to support 5G and WiFi Radios
Julian Jenkins, CTO, Perceptia Devices
Analog Bits Inc.
Analog Bits Inc.
Pinless Clocking and Sensing
Rounak Lokare, Sr. Circuit Design Engineer, Analog Bits Inc.
Analog Bits Inc.
Analog Bits Inc.
Interview with Mahesh Tirupattur - Executive Vice President - Analog Bits Inc.
Agile Analog
Agile Analog
Analog lP Subsystems
Graham Woods, Director of Applications Engineering, Agile Analog
Agile Analog
Agile Analog
Interview with Graham Woods - Director of Applications Engineering - Agile Analog
Synopsys Inc
Synopsys Inc
Low Power Memory Solution for AIoT and Edge applications
Bhavana Chaurasia, Product Manager, Synopsys Inc
Silicon Storage Technology, Inc.
Silicon Storage Technology, Inc.
eFlash IP for the AI & Chiplet Era
David Eggleston, Sr. Business Development Manager, Silicon Storage Technology, Inc.
Silicon Storage Technology, Inc.
Silicon Storage Technology, Inc.
Interview with David Eggleston - Sr. Business Development Manager - Silicon Storage Technology, Inc.
Alphawave Semi
Alphawave Semi
Navigating Chiplet Design Today - Comprehensive toolsets for an open ecosystem
Letizia Giuliano, Vice President Solution Engineering, Alphawave Semi
Marquee Semiconductor Inc.
Marquee Semiconductor Inc.
A proven silicon project management platform for complex SoCs and Chiplet based sys-tems
Purna Mohanty, CEO, Marquee Semiconductor Inc.
Marquee Semiconductor Inc.
Marquee Semiconductor Inc.
Interview with Purna Mohanty - CEO - Marquee Semiconductor Inc.
Perforce Software
Perforce Software
IP Management Best Practices for Chiplet-Based SoCs
Simon Butler, Methodics IPLM Founder & General Manager, Perforce Software
Synopsys, Inc.
Synopsys, Inc.
The Future of UCIe for Multi-Die Systems
Manuel Mota, Sr. Product Marketing Manager, Synopsys, Inc.
Signature IP Corporation
Signature IP Corporation
A Scalable, Configurable, Resilient Network-on-chip (NoC) for your complex SoC and Chiplet-based Systems
Parag Bhatt, VP of Engineering, Signature IP Corporation
Signature IP Corporation
Signature IP Corporation
Interview with Parag Bhatt - VP of Engineering - Signature IP Corporation
Arteris IP
Arteris IP
Accelerating Schedules with Physical Awareness for Network-on-Chip (NoC) IP
Guillaume Boillet, Sr. Director of Product Management, Arteris IP
Synopsys
Synopsys
Essential IP for the Enablement of Silicon Lifecycle Management
Ash Patel, Director of Product Line Management, SLM, Synopsys, Synopsys
Siemens Digital Industries Software
Siemens Digital Industries Software
Next Generation Hardware based Cyber Security solution using advanced Embedded Analytics monitoring technology
Lee Harrison, Director, Automotive IC Solutions, Siemens Digital Industries Software
Siemens Digital Industries Software
Siemens Digital Industries Software
Interview with Lee Harrison - Director, Automotive IC Solutions - Siemens Digital Industries Software
Alphawave Semi
Alphawave Semi
PAM4 PCIe -- Gen6 and beyond -- enabling the next gen of AI/ML
David Kulansky, Director, Alphawave Semi
GOWIN Semiconductor
GOWIN Semiconductor
The Future of USB Connectivity of FPGAs in Alternative Applications, Products, and Markets
David Grugett, Sr. Manager of FAE, GOWIN Semiconductor
GOWIN Semiconductor
GOWIN Semiconductor
Interview with David Grugett - Sr. Manager of FAE - GOWIN Semiconductor
Semidynamics Technology Services
Semidynamics Technology Services
RISC-V OOO IP Core and Vector Unit
Roger Espasa, CEO, Semidynamics Technology Services
Semidynamics Technology Services
Semidynamics Technology Services
Interview with Roger Espasa - CEO - Semidynamics Technology Services
Imperas Software
Imperas Software
The Lost Art of Processor Verification
Larry Lapides, Vice President Sales, Imperas Software
Imperas Software
Imperas Software
Interview with Larry Lapides - Vice President Sales - Imperas Software
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
TWS Applications with RISC-V and HiFi DSP
Casey Ng, Audio Marketing Director, Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Interview with Yuan Lu - President at Aizip - Cadence Design Systems, Inc.
Synopsys, Inc.
Synopsys, Inc.
Advancement in Multimedia interfaces servicing Edge AI markets
Hezi Saar, Senior Product Line Director, Synopsys, Inc.
Chips&Media, Inc.
Chips&Media, Inc.
Video IP Solution for Now and Beyond
Summer Yoon, Technical PR Manager, Chips&Media, Inc.
Synopsys, Inc.
Synopsys, Inc.
Driving the Future of High-Performance Computing through 224G Ethernet IP
Manmeet Walia, Director, Product Marketing, Synopsys, Inc.
Synopsys, Inc.
Synopsys, Inc.
Interview with Manmeet Walia - Director, Product Marketing - Synopsys, Inc.
Ericsson
Ericsson
5G drives exponential need in processing enabled by ASICs and IP ecosystem
Keith Hawkins, Head of ASIC COT, Ericsson
Flex Logix Technologies, Inc.
Flex Logix Technologies, Inc.
Fast, accurate and adaptable AI at low power, low cost
Cheng Wang, Senior VP Software/Architecture, CTO & Co-Founder, Flex Logix Technologies, Inc.
Flex Logix Technologies, Inc.
Flex Logix Technologies, Inc.
Interview with Cheng Wang - Senior VP Software/Architecture, CTO & Co-Founder - Flex Logix Technologies, Inc.
VeriSilicon, Inc.
VeriSilicon, Inc.
AI-ISP: Adding Real-Time AI Functionality to Image Signal Processing with Reduced Memory Footprint and Processing Latency
Mankit Lo, Chief Architect, NPU IP Development, VeriSilicon, Inc.
VeriSilicon, Inc.
VeriSilicon, Inc.
Interview with David Jarmon - Sr. VP Worldwide Sales - VeriSilicon, Inc.
Digital Core Design
Digital Core Design
New Horizontal Markets, Reap Benefits from Greater Avenues, using Controller Area Networks
Avi Zakai, Business Development of EBBM, Inc., Digital Core Design
Digital Core Design
Digital Core Design
Interview with Avi Zakai - Business Development of EBBM, Inc. - Digital Core Design
CAST, Inc.
CAST, Inc.
FuSa IP Cores for Automotive
Jit Sur, Sales Engineer, CAST, Inc.
CAST, Inc.
CAST, Inc.
Interview with Jit Sur - Sales Engineer - CAST, Inc.
LeWiz Communications, Inc.
LeWiz Communications, Inc.
Space Applications - IP Core Challenges and Opportunities
Chinh Le, CEO/CTO, LeWiz Communications, Inc.
LeWiz Communications, Inc.
LeWiz Communications, Inc.
Interview with Chinh Le - CEO/CTO - LeWiz Communications, Inc.
Rambus, Inc.
Rambus, Inc.
How to Secure Devices and Digital Assets with the Correct Root of Trust Solution
Matt Orzen, Director of Solution Architecture, Rambus, Inc.
Synopsys, Inc.
Synopsys, Inc.
Accelerating the Way Toward a Quantum-Safe Future
Wei Xu, Senior Staff FAE, Synopsys, Inc.
Digital Core Design
Digital Core Design
Eliminate CyberSecurity Threats, from Product Designs, at the Silicon Level with Post-Quantum Cryptographic Systems
Alex Angelou, CEO of EBBM, Inc., Digital Core Design
Digital Core Design
Digital Core Design
Interview with Alex Angelou - CEO of EBBM, Inc. - Digital Core Design
Intrinsic ID
Intrinsic ID
Securing System-in-Package with PUF Technology
Pim Tuyls, CEO, Intrinsic ID
Xiphera Ltd
Xiphera Ltd
Quantum-secure Signatures with Hardware-based Dilithium Core
Matti Tommiska, Xiphera Ltd

IP SoC 22 - Nov. 30 - Dec. 1, 2022

Design And Reuse
Design And Reuse
After 25 years what's new
Gabrièle Saucier, CEO, Design And Reuse
Codasip GmbH
Codasip GmbH
The processor revolution is brewing - it won't be like the past 25 years!
Mike Eftimakis, VP Strategy and Ecosystem, Codasip GmbH
STMicroelectronics
STMicroelectronics
Sustainability of the electronic industry : A major challenge and a mine of innovation
Patrick Blouet, Collaborative Program Manager, STMicroelectronics
Soitec
Soitec
CHIPS ACT: How Europe wakes-up
François Brunier, Partnership Program Manager, Soitec
ASYGN
ASYGN
BEYOND5 - Low power 5G access point
Daniel Saias, CEO, ASYGN
Silicon Radar GmbH
Silicon Radar GmbH
BEYOND5 - Car Interior Radar for Advanced Life-Signs Detection
Wojciech Debski, CTO, Silicon Radar GmbH
Soitec
Soitec
FDSOI the EU technology for a green transition
Philippe Flatresse, Soitec
Fraunhofer-Gesellschaft
Fraunhofer-Gesellschaft
OCEAN12 IP Factory: From Research to Silicon
Erkan Isa, Group Manager, Fraunhofer-Gesellschaft
Rambus, Inc.
Rambus, Inc.
Securing Automotive Semiconductors in the New Centralized Car Architecture​
Bart Stevens, Senior Director of Product Marketing, Rambus, Inc.
DCD-SEMI
DCD-SEMI
CAN ALL - secure & comprehensive solution (not only) for automotive
Jacek Hanke, CEO, DCD-SEMI
Synopsys, Inc.
Synopsys, Inc.
Automotive-Grade IP for Next-Generation Zonal Architectures
Philippe Borges, Sr Staff Applications Engineer, Synopsys, Inc.
Siliconally GmbH
Siliconally GmbH
Safe Communication Technology for Automated Vehicles
Benjamin Weinhardt, Head of Business and Collaboration Office, Siliconally GmbH
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
A Flexible Approach for Meeting Automotive Functional Safety and Security Requirements
George Wall, Group Director of Product Marketing for the Tensilica IP, Cadence Design Systems, Inc.
Dolphin Design
Dolphin Design
Democratizing Energy Friendly Ambient Computing
Vincent Huard, CTO, Dolphin Design
easics
easics
nearbAI: scalable neural network inference for ASICs in XR devices
Ramses Valvekens, CSO & managing director, easics
Andes Technology Corp.
Andes Technology Corp.
RISC-V and Functional Safety
Florian Wohlrab, Head of Sales EMEA & Japan, Andes Technology Corp.
CAES Gaisler
CAES Gaisler
RISC-V in Space
Fabio Malatesta, Product Marketing Engineer, CAES Gaisler
CloudBEAR
CloudBEAR
RISC-V processor IP product line
Alexander Kozlov, CTO, CloudBEAR
Crypto Quantique
Crypto Quantique
Overcoming Challenges in PUF Development
Ranga Desikachari,Matt Douthwaite, Head of Engineering,Senior Analog IC Design Engineer, Crypto Quantique
Synopsys, Inc.
Synopsys, Inc.
Post-Quantum Cryptography: Theory to Accelerated Practice
Ruud Derwig, Senior Principal Architect, Synopsys, Inc.
Intrinsic ID
Intrinsic ID
Building a Root of Trust with SRAM PUF and tRoot HSM
Geert-Jan Schrijen, CTO, Intrinsic ID
Secure-IC
Secure-IC
The importance of security lifecycle management
Ismail Guedira, Head of Sales EMEA, Secure-IC
Alphawave IP, Inc.
Alphawave IP, Inc.
Chiplet and Die-to-Die Interface Interoperability - how to accelerate path to a real Open Ecosystem
Letizia Giuliano, Vice President Solution Engineering, Alphawave IP, Inc.
Synopsys, Inc.
Synopsys, Inc.
Strength of UCIe for Multi-Die Systems
Andreas Vielhaber, Sr. Staff Application Engineer, Synopsys, Inc.
Alphacore, Inc.
Alphacore, Inc.
FDSOI High speed, low power hybrid ADC's for Communications, AI, and Automotive applications
Ken Potts, COO, Alphacore, Inc.
Phonemic
Phonemic
Lowering the power consumption of voice-controlled IoT devices
Michal Staworko, co-founder, Phonemic
Weebit Nano
Weebit Nano
How Embedded Non-Volatile Memory IP Can be a Differentiator
Eran Briman, VP Marketing & Business Development, Weebit Nano
Agile Analog
Agile Analog
Analog IP, the way you want it
Graham Woods, Director, Field Application Engineering Group, Agile Analog
Aniah
Aniah
All you need is an Electrical Rule Checker !
Vincent Bligny, CEO, Aniah
Perceptia Devices
Perceptia Devices
Selecting the Correct PLL for Your Application
Julian Jenkins, CTO and CEO, Perceptia Devices
Comcores
Comcores
Deterministic transmission of time critical information with TSN Ethernet (Time Sensitive Network)
Flemming Kongsfelt, Manager Packaged IP Solutions, Comcores
CAST, Inc.
CAST, Inc.
Addressing performance challenges of TCP/IP stack implementations
Andreas Emeretlis, Hardware Design Engineer, CAST, Inc.
Mixel, Inc.
Mixel, Inc.
Leveraging MIPI DSI-2 & MIPI CSI-2 Low-Power Display and Camera FPGA-based Subsystems
Mahmoud Banna, General Manager, Mixel, Inc.
Lemur-Imaging Ltd.
Lemur-Imaging Ltd.
Ultra-compact image compression IP core for saving on chip SRAM
Dr. Slava Chesnokov, CTO, Lemur-Imaging Ltd.
Defacto Technologies
Defacto Technologies
Unified methodology for SoC design assembly including logic, power and timing constraints
Chouki Aktouf, CEO/CTO, Defacto Technologies
Thalia Design Automation
Thalia Design Automation
Tackling ROIC SoC Design Reuse challenges with AMALIA platform
Ilya Temnikov,Jean-Francois Lambert, Director of EDA Engineering,Director of Business Development, Thalia Design Automation
Synopsys, Inc.
Synopsys, Inc.
Essential IP for the Enablement of Silicon Lifecycle Management
Dan Alexandrescu, Core Team Leader, Synopsys, Inc.
Menta
Menta
Programmable logic for ASIC/SoC without pain
Yoan Dupret, CTO and Managing Director, Menta
Instituto de Telecomunicações
Instituto de Telecomunicações
A Deep Learning-based Surrogate Model and Automata Synthesis Convergence For Jitter and Eye Estimation in Nonlinear High-Speed Links
Abdelgader Abdalla, Senior Researcher, Instituto de Telecomunicações
Codasip GmbH
Codasip GmbH
Interview with Mike Eftimakis - VP Strategy and Ecosystem - Codasip GmbH
Rambus, Inc.
Rambus, Inc.
Interview with Bart Stevens - Senior Director of Product Marketing - Rambus, Inc.
Siliconally GmbH
Siliconally GmbH
Interview with Benjamin Weinhardt - Head of Business and Collaboration Office - Siliconally GmbH
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Interview with Olivier Mazuyer - Sr. IP Sales Executive - Cadence Design Systems, Inc.
Dolphin Design
Dolphin Design
Interview with Frédéric Renoux - EVP Marketing and Sales - Dolphin Design
Andes Technology Corp.
Andes Technology Corp.
Interview with Florian Wohlrab - Head of Sales EMEA & Japan - Andes Technology Corp.
CAES Gaisler
CAES Gaisler
Interview with Fabio Malatesta - Product Marketing Engineer - CAES Gaisler
Synopsys, Inc.
Synopsys, Inc.
Interview with Ruud Derwig - Senior Principal Architect - Synopsys, Inc.
Alphawave IP, Inc.
Alphawave IP, Inc.
Interview with Letizia Giuliano - Vice President Solution Engineering - Alphawave IP, Inc.
Alphacore, Inc.
Alphacore, Inc.
Interview with Ken Potts - COO - Alphacore, Inc.
Weebit Nano
Weebit Nano
Interview with Gabriel Molas - Chief Scientist - Weebit Nano
Agile Analog
Agile Analog
Interview with Barry Paterson - CEO - Agile Analog
Aniah
Aniah
Interview with Vincent Bligny - CEO - Aniah
Mixel, Inc.
Mixel, Inc.
Interview with Mahmoud Banna - General Manager - Mixel, Inc.
Defacto Technologies
Defacto Technologies
Interview with Chouki Aktouf - CEO/CTO - Defacto Technologies
Menta
Menta
Interview with Yoan Dupret - CTO and Managing Director - Menta
Crypto Quantique
Crypto Quantique
Interview with Shahram Mossayebi - CEO - Crypto Quantique

IP SoC China 22 - September 7, 2022

Design And Reuse
Design And Reuse
Which media vehicle for serving an IP soc community?
Gabriele Saucier, CEO & Founder, Design And Reuse
SSIPEX
SSIPEX
The opportunity and challenge for China Semiconductor
Bulu Xu,Cherie Su, SSIPEX
Innosilicon Technology Ltd
Innosilicon Technology Ltd
The Breakthrough of Domestic High-End IP and Custom ASIC in Advanced Process Nodes
Zachary Gao, Technical Director, Innosilicon Technology Ltd
OpenFive
OpenFive
IP Subsystems for Edge and Accelerators
Jensen Xin, IP FAE & ASIC TSM, OpenFive
Siliconarts, Inc.
Siliconarts, Inc.
IP Cores for the Metaverse
Charles Kim, Marketing Manager, Siliconarts, Inc.
Agile Analog
Agile Analog
Why silicon Proven is NOT what you think?
Michael Lei, Senior FAE, Agile Analog
Synopsys, Inc.
Synopsys, Inc.
Essential IP for the Enablement of Silicon Lifecycle Management
Alex Yu, Sr Mgr, Solutions, Synopsys Silicon Realization Group, Synopsys, Inc.
Thalia Design Automation
Thalia Design Automation
Save time, resources and costs with faster and reliable IP reuse by Thalia
Fionn Liu, Thalia China Rep, Thalia Design Automation
Mobiveil Inc.
Mobiveil Inc.
Accelerating NVMe SSD Designs using IP and Platforms
Ravi Thummarukudy, CEO, Mobiveil Inc.
Corigine Inc.
Corigine Inc.
EDA Innovations from Corigine
Yemin Qiu, EDA Sales General Manager, Corigine Inc.
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
Cadence Chiplet IP and Tool Solutions
Arno Li, AE Director, Cadence Design Systems, Inc.
Synopsys, Inc.
Synopsys, Inc.
For Key Benefits of very short reach connectivity for optical modules
Leon Zhang, Senior Product Marketing Manager, Synopsys, Inc.
CloudBEAR
CloudBEAR
RISC-V processor IP product line
Alexander Kozlov, CTO, CloudBEAR
Syntacore
Syntacore
Unleash the power of RISC-V with Syntacore custom cores and tools
John Hartley, Chief Commercial Officer, Syntacore
Flex Logix Inc.
Flex Logix Inc.
Reconfigurable Computing with Analog Chips and MCUs for Rapidly Changing Markets
Michael Ji, Director of Solutions Architecture, Flex Logix Inc.
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
IP Solutions targeting broad range from Sensing to On-Device AI for Automotive Market Needs
Wei Wang, AE Director, Cadence Design Systems, Inc.
AkroStar Technology Co., Ltd.
AkroStar Technology Co., Ltd.
IP enables automotive SoC development
Haopeng Liu, Technical Support Director, AkroStar Technology Co., Ltd.
Innosilicon Technology Ltd
Innosilicon Technology Ltd
One-Stop Solution for IP and Automotive Chips
William Wang, Director of Sales, Innosilicon Technology Ltd
Siemens Digital Industries Software
Siemens Digital Industries Software
Cybersecurity threat detection and mitigation: A new hardware-based approach
Fanjin Meng, Tessent Deputy Director, Siemens Digital Industries Software
Brite Semiconductor
Brite Semiconductor
Highly Integrated Security IP Solutions
Eunice Rao, Brite Semiconductor
Allegro DVT
Allegro DVT
Market traction of recent video codecs: VVC & AVS3
Yujing Wei, VP of Business Development, Allegro DVT
Synopsys, Inc.
Synopsys, Inc.
How to satisfy growing bandwidth demands of camera, display and storage of mobile & automotive design
Kelvin Xu, Senior Product Marketing Manager, Synopsys, Inc.
Cadence Design Systems, Inc.
Cadence Design Systems, Inc.
AR/VR Marketing Analysis and Cadence Tensilica Solution
Wendy Chen, IP and Ecosystem Sales Group Sr Director of Asia-Pac & Japan, Cadence Design Systems, Inc.
Rambus, Inc.
Rambus, Inc.
Memory Bandwidth for AI/ML Races Higher with HBM3
Bruce Luo, Director of Sales, Rambus, Inc.
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
AI-ISP - Breaking Image Quality Barrier by Deeply Embedding NPU into ISP Pipeline
Kainan Cha, Vice President of Machine Learning Software, VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Expedera
Expedera
Optimal Neural Network Acceleration via a Packet-based Architecture
Paul Karazuba,William Kou, Vice President of Marketing,VP of Sales, Expedera

IP SoC Conference 21 - December 1-2, 2021

Design And Reuse
Design And Reuse
Entering D&R 25th year: a Quarter of a century of IP business
Gabriele Saucier, CEO, Design And Reuse
Soitec
Soitec
FDSOI:The European technology for the digital and green transition
Francois Brunier, Partnership Program Manager, Soitec
STMicroelectronics
STMicroelectronics
Toward Green ECS: a real challenge for Europe
Patrick Blouet, Collaborative Program Manager, STMicroelectronics
Thalia DA
Thalia DA
A comprehensive new solution to IP Development and Reuse - Circuits to ESDs
Ilya Temnikov, Principal EDA Engineer, Thalia DA
eInfochips, Inc.
eInfochips, Inc.
Accelerating Functional Coverage Generation Using AI
Priyanka Singh, Senior Engineer, eInfochips, Inc.
HDL Design House
HDL Design House
Design and Verify With Confidence with HDL Design House ARM Expertise
Nina Spasojevic, Marketing Manager, HDL Design House
Sofics
Sofics
How to choose custom ESD IP for your next IC
Thomas Ako, Business Development, Sofics
Alphacore Inc
Alphacore Inc
High speed, low power hybrid ADC for direct to RF sampling applications.
Ken Potts, Chief Operating Officer, Alphacore Inc
Omni Design Technologies, Inc.
Omni Design Technologies, Inc.
Use of High-Speed Data Converters to Enable Automotive and 5G Applications
Manar El-Chammas, VP Engineering, Omni Design Technologies, Inc.
CEVA, Inc.
CEVA, Inc.
UWB - Challenges and solution of this reborn standard
Olivier Mazuyer, Regional Sales Manager, CEVA, Inc.
Synopsys, Inc.
Synopsys, Inc.
Optimal SMBus System Topology with Multiple Slaves in One Physical Instance
Manish Kumar Pandey, Sr. ASIC Digital Design Engineer, Synopsys, Inc.
ArterisIP
ArterisIP
Automating Hardware-Software Interface (HSI) Creation Using NoC Interconnect and IP Deployment Technology
Yaron Semiat, Product Owner, ArterisIP
Synopsys, Inc.
Synopsys, Inc.
Saving Power for High-Performance Computing - One Interface at a Time
Priyank Shukla, Sr. Staff Product Marketing Manager, Synopsys, Inc.
eInfochips, Inc.
eInfochips, Inc.
Low Power Sub State Management in PCIe LTSSM
Rajal Jamvecha, Engineer, eInfochips, Inc.
Alphawave IP, Inc.
Alphawave IP, Inc.
Powering the Data Explosion
Tony Pialis, CEO & President, Alphawave IP, Inc.
Mixel, Inc.
Mixel, Inc.
MIPI D-PHY and MIPI CSI-2 for IoT: AI Edge Devices
Ashraf Takla, Founder & CEO, Mixel, Inc.
Microchip SST
Microchip SST
memBrain - the "in memory compute" IP for AI devices
Christopher Neil Brown, Senior Manager - SST IP & Technology, Microchip SST
Rambus, Inc.
Rambus, Inc.
Selecting the Right High Bandwidth Memory
Frank Ferro, Sr Dir Product Marketing, Rambus, Inc.
Andes Technology Corp.
Andes Technology Corp.
RISC-V Goes Big!
Florian Wohlrab, Head of Sales EMEA and Japan, Andes Technology Corp.
CAES Gaisler
CAES Gaisler
Feature set extensions of NOEL-V, a configurable 32-bit and 64-bit RISC-V IP
Christian Sayer, FAE, CAES Gaisler
Synopsys, Inc.
Synopsys, Inc.
DesignWare ARC VPX - The DSP for a Data-centric World
Markus Willems, Sr. Product Marketing Manager, Synopsys, Inc.
Intrinsic ID
Intrinsic ID
Flexible hardware-based security for every chip based on SRAM PUFs
Geert-Jan Schrijen, CTO, Intrinsic ID
INVIA
INVIA
How analog detectors can strengthen your SoC immunity to fault attacks
Vincent TELANDRO, Sales Manager at Thales DIS Design Services, INVIA
Dolphin Design
Dolphin Design
New solutions for Energy efficient Edge Computing
Nicolas Gaude, Business Development and Product Marketing Manager, Dolphin Design
Low Power Futures
Low Power Futures
Distributed Learning and Sensor Fusion for IoT Sensors: A Power Saving Opportunity
DR. Abdoulaye BERTHE, Founder and CEO, Low Power Futures
Synopsys SLM
Synopsys SLM
Implementation of supply droop monitoring IP for HPC and AI applications targeting advanced node SoCs
Stephen Crosher, Strategic Programs Director, Synopsys SLM
easics NV
easics NV
nearbAI: platform-independent & scalable real-time embedded neural network inference
Ramses Valvekens, CSO & managing director, easics NV
Rambus, Inc.
Rambus, Inc.
Next-Generation Displays: An Integrated IP Solution from Mixel, Rambus and Hardent
Joseph Rodriguez,Justin Endo - Mixel,Alain Legault - Hardent, Sr Product Marketing Engineer, Rambus, Inc.
Rambus, Inc.
Rambus, Inc.
Securing Automotive Semiconductors in the New Centralized Car Architecture
Thierry Kouthon, PE Product Management, Rambus, Inc.

IP SoC Silicon Valley 21 - April 6th, 2021

Design & Reuse
Design & Reuse
D&R mission : New Trends
Gabriele Saucier, CEO, Design & Reuse
Alphawave IP, Inc.
Alphawave IP, Inc.
Enabling Next Generation Silicon In Package Products
Tony Pialis, CEO, Alphawave IP, Inc.
Sofics
Sofics
ESD protection for 2.5D and 3D hybrid integration
Bart Keppens, Chief Business Development, Sofics
Synopsys, Inc.
Synopsys, Inc.
Using Die-to-Die PHY IP to Ensure Known-Good-Dies
Manuel Mota, Sr. Product Marketing Manager, Synopsys, Inc.
OpenFive
OpenFive
Die-to-Die Interface PHY and Controller Subsystem for Next Generation Chiplets
Ketan Mehta, Sr Director Product Marketing, Interface IP, OpenFive
Rambus, Inc.
Rambus, Inc.
Selecting the Right High Bandwidth Memory Solution
Frank Ferro, Senior Director Product Management, Rambus, Inc.
eMemory Technology Inc.
eMemory Technology Inc.
eMemory's Embedded ReRAM Solution on Nanometer Technologies
Howard Ching, Project Manager, eMemory Technology Inc.
Synopsys, Inc.
Synopsys, Inc.
Simple, Scalable, and Efficient Automation - Accelerating Verification Closure for Cache Coherent SoCs
Anika Malhotra, Senior Product Marketing Manager, Synopsys, Inc.
NXP Semiconductors
NXP Semiconductors
Enablement of Early Verification Closure Of Debug on a SoC by a Novel V&V Method
Vardhana M, Design Engineer, NXP Semiconductors
Corigine Inc.
Corigine Inc.
Prototyping System for SOC and IP Subsystem Verification
Ali Khan, VP Business & Product Development, Corigine Inc.
Synopsys, Inc.
Synopsys, Inc.
Essential Features of IP for PCI Express 6.0
Gary Ruggles, Sr. Product Marketing Manager, Synopsys, Inc.
Mobiveil Inc.
Mobiveil Inc.
Accelerating innovations at the Data Center using CXL Technology
Ravi Thummarukudy, CEO Mobiveil, Mobiveil Inc.
Secure-IC
Secure-IC
Security from chip to cloud
Charles Thooris, Chief Sales Officer, Secure-IC
PUFsecurity
PUFsecurity
PUF-based Solutions for Supply Chain Protection
Lawrence Liu, Senior Engineer, PUFsecurity
CurrentRF
CurrentRF
The CC-100IP-MB Mileage Booster IP, Extending the Driving Range of Electric Vehicles
Michael Hopkins, Founder/CEO, CurrentRF
Synopsys, Inc.
Synopsys, Inc.
The Future of Embedded Monitoring IP & Lifecycle Management within Automotive Contexts
Stephen Crosher, SLM Strategic Programs Director at Synopsys Inc, Synopsys, Inc.
Comcores
Comcores
Time Sensitive Networking for Automotive Applications
David,Thomas Bissonette,Schulze, Business Development & Sales Director,Senior VP Sales & Marketing at Xena Networks, Comcores
Chips&Media, Inc.
Chips&Media, Inc.
More Advanced, Optimized, and Efficient the Next-Generation Video IPs
Scott Woo, Marketing Team Leader, Chips&Media, Inc.
Synopsys, Inc.
Synopsys, Inc.
Benefits of an Integrated MIPI C-PHY and D-PHY IP Solution for Camera and Display SoCs
Licinio Sousa, Sr. Product Marketing Manager, Synopsys, Inc.
Synopsys, Inc.
Synopsys, Inc.
Next Generation High Performance Computing Designs with 112G Ethernet PHY IP
Priyank Shukla, Sr. Staff Product Marketing Manager, Synopsys, Inc.
Flex Logix Technologies, Inc.
Flex Logix Technologies, Inc.
Using eFPGA to Dynamically Adapt to Changing Workloads
Andy Jaros, VP IP Sales and Marketing, Flex Logix Technologies, Inc.

IP SoC Conference 2020 - December 8-9th, 2020

Allegro DVT
Allegro DVT
Safety Critical Video Codec IPs in Automotive
Doug Ridge, Strategic Marketing Manager, Allegro DVT
Design And Reuse
Design And Reuse
Covid 19 Pandemic effect Virtual, physical of hybrid events?
Gabriele Saucier, CEO, Design And Reuse
Arm Ltd.
Arm Ltd.
Lowering the Barriers to Innovation for Silicon Startups
Phil Burr, Director for Business Transformation, Arm Ltd.
Soitec
Soitec
Live on the Edge with FDSOI
Philippe Flatresse, Product Marketing, FD-SOI Business Unit, Soitec
Mixel, Inc.
Mixel, Inc.
Leveraging FDSOI Technology for MIPI Applications
Eric Hong, Senior Director of Engineering, Mixel, Inc.
CEA-LIST
CEA-LIST
Energy Efficient 3D Many Core Architecture including Cache Coherency and Power Management
Pascal VIVET, Scientific Director, CEA-LIST
Silicon Interfaces
Silicon Interfaces
PCIe IP using IEEE UVM Virtual Methods and Parameterization
Shikhadevi Katharia, Engineer - VLSI Design, Silicon Interfaces
Silvaco, Inc.
Silvaco, Inc.
What's in the new MIPI I3C V1.1 Standard? And what is coming?
Rajeev Huralikoppi, IP Application Engineer, Silvaco, Inc.
Synopsys, Inc.
Synopsys, Inc.
USB4: A Complex Standard that Simplifies the User Experience
Eric Huang, Sr. Product Marketing Manager, Synopsys, Inc.
Innosilicon Technology Ltd
Innosilicon Technology Ltd
Innosilicon: Introduction of advanced DDR technology-DDR5/LPDDR5, GDDR6, HBM2E, INNOLINK
Zachary Gao, DDR Technical Director, Innosilicon Technology Ltd
Alphawave IP, Inc.
Alphawave IP, Inc.
How DSP is Enabling 224Gbps Serial Links
Tony Pialis, CEO & President, Alphawave IP, Inc.
Rambus, Inc.
Rambus, Inc.
Security by Design Approach for Semiconductors
Neeraj Paliwal, VP & GM, Rambus Security, Rambus, Inc.
eMemory Technology Inc.
eMemory Technology Inc.
PUF Based Security IPs in IoT and AIoT Applications
Sean Wang, Senior Project Manager, eMemory Technology Inc.
CloudBEAR
CloudBEAR
RISC-V processor IP product line
Alexander Kozlov, CTO, CloudBEAR
Cobham Gaisler
Cobham Gaisler
From LEON to NOEL-V processor
Jan Andersson, Director of Egineering, Cobham Gaisler
Synopsys, Inc.
Synopsys, Inc.
Techniques for Faster, Lower Power AI Algorithm Execution with Foundation IP
Rahul Thukral, Sr. Product Marketing Manager, Synopsys, Inc.
Arm Ltd.
Arm Ltd.
Next-generation endpoint AI for IoT with the new Arm Cortex-M55 and Ethos-U55 processors
Mark Quartermain, Senior Product Manager, Arm Ltd.
Andes Technology Corp.
Andes Technology Corp.
AI: Scale from Edge to Server with RISC-V and Linux
Florian Wohlrab, Head of Sales for EMEA and Japan, Andes Technology Corp.
Perceptia Devices, Inc.
Perceptia Devices, Inc.
Using PLLs to simplify DVFS power management in AI and multiprocessor designs
Julian Jenkins, CEO and CTO, Perceptia Devices, Inc.
CEVA, Inc.
CEVA, Inc.
Combining AI in consumer devices using a scalable vector DSP
Tomer Koren, Machine Learning System Engineer, CEVA, Inc.
Ericsson
Ericsson
A MIMO radio head at 39GHz targeting 5G NR connectivity inside commercial airplanes
Fredrik Tillman, Head of Integrated Radio Systems, Ericsson
Omni Design Technologies, Inc.
Omni Design Technologies, Inc.
High speed data converters for 5G and Lidar
Hyun Boo, Co-founder, Sr. Director of Product Management, Omni Design Technologies, Inc.
Analog Bits Inc.
Analog Bits Inc.
Differentiated Clocking, Sensor and Interconnect IP’s (5nm and below) for AI/Data Center SOC’s
Mahesh Tirupattur, Executive VP Sales, Marketing & Operations, Analog Bits Inc.
Synopsys, Inc.
Synopsys, Inc.
Defending the Cloud: Data Protection for High-Performance Computing
Craig Forward, Sr. Security Products Development Lead, Synopsys, Inc.
Synopsys, Inc.
Synopsys, Inc.
Accelerating Automotive FuSa SoC Design and Certification for ADAS
Rupal Gandhi, Sr. Technical Marketing Manager, Synopsys, Inc.
CurrentRF
CurrentRF
Mileage Enhancement by Utilizing Wasted Current in Electric Vehicle and e-bike Conversion Systems
Michael Hopkins, Founder/CEO, CurrentRF
Mirabilis Design Inc.
Mirabilis Design Inc.
Architect ECU software and hardware, Next-Gen Automotive Network and gateway design
Deepak Shankar, Founder, Mirabilis Design Inc.
Dolphin Design
Dolphin Design
Configurable Software PMU or Low-Power Hardware PMU? Get both with a configurable Power controller IP
Pierre GAZULL, Business Development and Product Marketing, Dolphin Design
eInfochips, Inc.
eInfochips, Inc.
Modeling Approach of Analog Blocks for Digital Centric Mixed Signal Verification
Babun Chandra Pal, Member of Technical Staff, eInfochips, Inc.
Silvaco, Inc.
Silvaco, Inc.
Trusted Variations-aware design solution at advanced nodes!
Dr. Firas Mohamed, VP, Advanced R&D, Silvaco, Inc.
Thalia Design Automation
Thalia Design Automation
AMALIA Technology Analyzer - Increasing confidence in Analog & Mixed Signal IP Reuse
Sowmyan Rajagopalan, Founder and CTO, Thalia Design Automation
Silicon Interfaces
Silicon Interfaces
Measurable defects detected using Concurrent & Distributed SFF Fault Simulation of PRBS
Neil More, Engineer - VLSI Design, Silicon Interfaces
INP Grenoble
INP Grenoble
Testing mmW IP : How solve this SoC design challenge ?
Marc Margalef-Rovira, Postdoctoral Researcher at IEMN CNRS, INP Grenoble

IP SoC Santa Clara 2019 videos - April 9th.

Algodone
Algodone
Algodone at IP SoC Santa Clara 2019
Jin Zhang, VP Marketing
Andes Technology
Andes Technology
Andes Technology at IP SoC Santa Clara 2019
Frankwell Lin, President
Arm
Arm
Arm at IP SoC Santa Clara 2019
Olivier Bernard
IP Coreworx & Callaghan Innovation
IP Coreworx & Callaghan Innovation
Custom IP Cores
Chatu Lokuge, Team Leader, RTS Communication
CAST Inc.
CAST Inc.
CAST at IP SoC Santa Clara 2019
Peter Dumin, Sr Application Engineer
Corigine Inc.
Corigine Inc.
Corigine at IP SoC Santa Clara 2019
Ali Khan, VP of Business and Product Development
efabless Corporation
efabless Corporation
efabless Corporation at IP SoC Santa Clara 2019
Mike Wishart , Chief Executive Officer
Mentor, a Siemens Business
Mentor, a Siemens Business
Mentor at IP SoC Santa Clara 2019
Farzad Zarrinfar, Managing Director, IP Division
Mobiveil, Inc.
Mobiveil, Inc.
Platforms for SSD and IoT Applications
Amit Saxena, VP of Engineering
Rambus Inc.
Rambus Inc.
Rambus at IP SoC Santa Clara 2019
Ben Levine, Sr. Director of Product Marketing for Cryptography
Silicon Creations
Silicon Creations
Silicon Creations at IP SoC Santa Clara 2019
Rick Ader, VP of Sales
SiliConch Systems
SiliConch Systems
SiliConch Systems at IP SoC Santa Clara 2019
Shubham Paliwal, Co-Founder & Micro Architect
Silvaco, Inc.
Silvaco, Inc.
Next Generation of SoC Design flow -- From Atoms to System solutions
Babak Taheri, CTO and EVP of Products
Synopsys Inc.
Synopsys Inc.
Synopsys at IP SoC Santa Clara 2019
Rita Horner, Sr. Technical Marketing Manager
Synopsys Inc.
Synopsys Inc.
Synopsys at IP SoC Santa Clara 2019
Ron Lowman, Strategic Marketing Manager
Thalia Design Automation
Thalia Design Automation
Thalia Design Automation at IP SoC Santa Clara 2019
Sowmyan Rajagopalan, Founder & CTO
UltraSoC
UltraSoC
UltraSoC at IP SoC Santa Clara 2019
John Hartley, VP Global Sales
Vidatronic Inc.
Vidatronic Inc.
Vidatronic at IP SoC Santa Clara 2019
Moises Robinson, President and Co-Founder
Vsora
Vsora
A New DSP Approach for 5G and AI
Albert Camilleri

Partner with us

Contact Us
Partnership Offers

List your Products

Suppliers, list and add your products for free.

List your Products

More about D&R Privacy Policy

© 2024 Design And Reuse

All Rights Reserved.

No portion of this site may be copied, retransmitted, reposted, duplicated or otherwise used without the express written permission of Design And Reuse.

I understand
This website uses cookies to store information on your computer/device. By continuing to use our site, you consent to our cookies. Please see our Privacy Policy to learn more about how we use cookies and how to change your settings if you do not want cookies on your computer/device.