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December 5th - 6th, 2018

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DAY 1: Wednesday December 5th, 2018 : "The Big vision"

Where IP starts Chair : Gabrièle Saucier, D&R.
8:45 am	Welcome By Gabrièle Saucier CEO Design & Reuse France
9:05 am	FD-SOI: how material & design innovations enable new market opportunities Slides Video By Manuel Sellier SOITEC France
9:25 am	Designing with TSMC Open Innovation Platform (OIP) Ecosystem By Wenchi Chang TSMC Taiwan
9:45 am	What's missing in the China IP puzzles? Slides By Mark Ma General Manager and Founder Jiatao Industrial Co., Ltd. China
10:05 am	Break
New IP Trends Chair : Philippe Quinio, ST Microelectronics
10:40 am	The changing face of edge compute Video By Joe Hanson Sr. Manager of Channel Sales Arm Ltd. USA
11:00 am	High-Performance Interface IP : When Big Data Meets High Compute By Rishi Chugh Cadence Design Systems, Inc. USA
11:20 am	NMAX Neural Inference Processor - very high performance at very low DRAM bandwidth Slides Video By Tony Kozaczuk Director of Solutions Architecture Flex Logix Technologies, Inc. USA
11:40 am	The Marriage of AI and Safety in Automotive SoCs. By Martyn Bronziet Sr Applications Engineer Synopsys Inc. USA
12:00 pm	Lunch Break
Market status and IP management Chair : Philippe AYZAC, Thales Alenia Space France
1:10 pm	Design IP Status & 5 Years Growth By Eric Esteve IPnest-Semiwiki France
1:30 pm	Introducing BlockChain Infrastructure for IP Management Systems - An Investigation By Mukund Pai Intel Corporation USA
1:50 pm	Secure and Intelligent IP Delivery Manager Best IPMS User Prize Slides By Gabriele Saucier Design and Reuse France
2:10 pm	Adding SALT™ to Product Lifecycle Management for IP Tracking and Silicon Configuration Slides By Jerome Rampon Algodone France
2:30 pm	Break
Internet of Things Chair : Bill Finch, CAST Inc.
2:50 pm	Addressing the Energy Efficiency Challenges of IoT end points Slides By Pierre Gazull Dolphin Integration France
3:10 pm	Low Power Compression Engine on Wearable Devices By Caesar Chang Taiwan Imaging Tek Taiwan
3:30 pm	Security acceleration for datacenter/cloudcomputing in the IoT Slides By Pieter Willems Strategic sales and Marketing Manager Silex Insight Belgium
3:50 pm	Speed-up your next IoT design with Arm Secure Foundations Slides By David Henry Product Manager Arm Ltd. UK
4:10 pm	Break
Security IP Chair : Joe Hanson, Arm Ltd.
4:30 pm	Secure device lifecycle Slides Video By Stuart Kincaid Security Architect Inside Secure S.A. France
4:50 pm	Security from Silicon to Software By Ruud Derwig Synopsys Inc. USA
5:10 pm	Pre-Silicon Security Evaluation : Security Verification Towards EDA Slides By Ismail GUEDIRA Secure IC SAS France
5:30 pm	Break
RISC-V Ecosystem Andy Jaros, Flex Logix Technologies, Inc.
5:50 pm	A Customizable RISC-V to Fit Your SoC Needs By Kevin Chen Andes Technology Corp. Taiwan
6:10 pm	Wine Tasting Party
7:00 pm	French Touch Banquet

DAY 2: Thursday December 6th, 2018 : "Innovation in the designer world"

Vision for the future Chair : Mukund Pai, Intel Corporation
9:00 am	Significance and Evolution of Semiconductor IP By Kush Gulati Omni Design Technologies, Inc. USA
9:20 am	IP - The Lifeblood of SOC Designs Slides Jai Durgam VP and GM of the IP Business Unit Silvaco USA
9:40 am	IP and intelligent systems for automotive Slides Video By Bill Finch Senior VP CAST Inc. USA
10:00 am	Ocean 12: Ultra low power computing solutions for automotive and aeronautics using all the range of FDSOI technologies By Francois Brunier SOITEC France
10:20 am	Panel : How to favor innovation transfer from Research Centers to the IP/Product Open market in the IP SoC design field : The EU FDSOI projects as a case study This panel will address the critical problem of technology transfer from design centers actively involved in advanced design activities to Industry in the IP SoC design world. With the participation of : Stéphane Emery (Head of System-on-chip design, CSEM) Patrick Blouet (EU Project manager at STMicrolectronics) JC Crebier (CMP) Slides G. Saucier (D&R )
11:20 am	Break
How to make IoT applications real Chair : Chris Brown, SST Microchip.
11:40 am	Enabling the embedded and IoT revolution with faster SoC and FPGA development By Joe Hanson Sr. Manager of Channel Sales Arm Ltd. USA
12:00 pm	Value of E2E Silicon-proven IP for Wireless Connectivity By Gerry Conlon Imagination Technologies UK
12:40 pm	Lunch Break
Analog Design Chair : Yannick Paillard, Dolphin Integration.
1:40 pm	Analog IP reuse and process migration: The challenges, and an innovative methodology & toolset to efficiently address them Slides By Sowmyan Rajagopalan Founder Thalia Design Automation UK
2:00 pm	Virtual digital sensor for analog signal processing on SoCs By Vinay Bansal Faststream Technologies USA
2:20 pm	Turning classical sensor hardware into intelligent sensors using sub-threshold design for ultra-low power sensor applications By Marc Pons Sole CSEM S.A Switzerland
2:40 pm	Break
The Low Power challenge Chair : Kush Gulati, Omni Design Technologies, Inc.
3:00 pm	A Mixed-signal ic for managing power in 5G applications Slides By David Fleischer Founder and Manager ADSR, Ltd. Israel
3:20 pm	Unlocking the full potential of Body Bias with FD-SOI to design the most energy-efficient SoC Slides Video By Frederic Renoux Dolphin Integration France
3:40 pm	Customizing Future Low Power IP Innovation Slides By Tony Stansfield sureCore Ltd UK
4:00 pm	How to accelerate SoC power architecture exploration Slides By Martine Falhon Product Marketing Manager Dolphin Integration France
And more
4:20 pm	Needs, Challenges and Innovations in Silicon Chips to make them Electromagnetic Noise and hazards resistant. Slides By Rajesh Gupta GreenIPCore India

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