IP SoC 2018 Program
DAY 1: Wednesday December 5th, 2018 : "The Big vision"
Where IP starts Chair : Gabrièle Saucier, D&R. |
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8:45 am |
Welcome
![]() CEO Design & Reuse France |
9:05 am |
FD-SOI: how material & design innovations enable new market opportunities
![]() SOITEC France |
9:25 am |
Designing with TSMC Open Innovation Platform (OIP) Ecosystem
![]() TSMC Taiwan |
9:45 am |
What's missing in the China IP puzzles?
![]() General Manager and Founder Jiatao Industrial Co., Ltd. China |
10:05 am | Break |
New IP Trends Chair : Philippe Quinio, ST Microelectronics |
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10:40 am |
The changing face of edge compute
![]() Sr. Manager of Channel Sales Arm Ltd. USA |
11:00 am |
High-Performance Interface IP : When Big Data Meets High Compute
![]() Cadence Design Systems, Inc. USA |
11:20 am |
NMAX Neural Inference Processor - very high performance at very low DRAM bandwidth
![]() Director of Solutions Architecture Flex Logix Technologies, Inc. USA |
11:40 am |
The Marriage of AI and Safety in Automotive SoCs.
![]() Sr Applications Engineer Synopsys Inc. USA |
12:00 pm | Lunch Break |
Market status and IP management Chair : Philippe AYZAC, Thales Alenia Space France |
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1:10 pm |
Design IP Status & 5 Years Growth
![]() IPnest-Semiwiki France |
1:30 pm |
Introducing BlockChain Infrastructure for IP Management Systems - An Investigation
![]() Intel Corporation USA |
1:50 pm |
Secure and Intelligent IP Delivery Manager Best IPMS User Prize ![]() Design and Reuse France |
2:10 pm |
Adding SALT™ to Product Lifecycle Management for IP Tracking and Silicon Configuration
![]() Algodone France |
2:30 pm | Break |
Internet of Things Chair : Bill Finch, CAST Inc. |
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2:50 pm |
Addressing the Energy Efficiency Challenges of IoT end points
![]() Dolphin Integration France |
3:10 pm |
Low Power Compression Engine on Wearable Devices
![]() Taiwan Imaging Tek Taiwan |
3:30 pm |
Security acceleration for datacenter/cloudcomputing in the IoT
![]() Strategic sales and Marketing Manager Silex Insight Belgium |
3:50 pm |
Speed-up your next IoT design with Arm Secure Foundations
![]() Product Manager Arm Ltd. UK |
4:10 pm | Break |
Security IP Chair : Joe Hanson, Arm Ltd. |
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4:30 pm |
Secure device lifecycle
![]() Security Architect Inside Secure S.A. France |
4:50 pm |
Security from Silicon to Software
![]() Synopsys Inc. USA |
5:10 pm |
Pre-Silicon Security Evaluation : Security Verification Towards EDA
![]() Secure IC SAS France |
5:30 pm | Break |
RISC-V Ecosystem Andy Jaros, Flex Logix Technologies, Inc. |
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5:50 pm |
A Customizable RISC-V to Fit Your SoC Needs
![]() Andes Technology Corp. Taiwan |
6:10 pm | Wine Tasting Party |
7:00 pm | French Touch Banquet |
DAY 2: Thursday December 6th, 2018 : "Innovation in the designer world"
Vision for the future Chair : Mukund Pai, Intel Corporation |
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9:00 am |
Significance and Evolution of Semiconductor IP
![]() Omni Design Technologies, Inc. USA |
9:20 am |
IP - The Lifeblood of SOC Designs
![]() VP and GM of the IP Business Unit Silvaco USA |
9:40 am |
IP and intelligent systems for automotive
![]() Senior VP CAST Inc. USA |
10:00 am |
Ocean 12: Ultra low power computing solutions for automotive and aeronautics using all the range of FDSOI technologies
![]() SOITEC France |
10:20 am |
Panel : How to favor innovation transfer from Research Centers to the IP/Product Open market in the IP SoC design field : The EU FDSOI projects as a case study
This panel will address the critical problem of technology transfer from design centers actively involved in advanced design activities to Industry in the IP SoC design world. With the participation of :
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11:20 am | Break |
How to make IoT applications real Chair : Chris Brown, SST Microchip. |
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11:40 am |
Enabling the embedded and IoT revolution with faster SoC and FPGA development
![]() Sr. Manager of Channel Sales Arm Ltd. USA |
12:00 pm |
Value of E2E Silicon-proven IP for Wireless Connectivity
![]() Imagination Technologies UK |
12:40 pm | Lunch Break |
Analog Design Chair : Yannick Paillard, Dolphin Integration. |
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1:40 pm |
Analog IP reuse and process migration: The challenges, and an innovative methodology & toolset to efficiently address them
![]() Founder Thalia Design Automation UK |
2:00 pm |
Virtual digital sensor for analog signal processing on SoCs
![]() Faststream Technologies USA |
2:20 pm |
Turning classical sensor hardware into intelligent sensors using sub-threshold design for ultra-low power sensor applications
![]() CSEM S.A Switzerland |
2:40 pm | Break |
The Low Power challenge Chair : Kush Gulati, Omni Design Technologies, Inc. |
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3:00 pm |
A Mixed-signal ic for managing power in 5G applications
![]() Founder and Manager ADSR, Ltd. Israel |
3:20 pm |
Unlocking the full potential of Body Bias with FD-SOI to design the most energy-efficient SoC
![]() Dolphin Integration France |
3:40 pm |
Customizing Future Low Power IP Innovation
![]() sureCore Ltd UK |
4:00 pm |
How to accelerate SoC power architecture exploration
![]() Product Marketing Manager Dolphin Integration France |
And more | |
4:20 pm |
Needs, Challenges and Innovations in Silicon Chips to make them Electromagnetic Noise and hazards resistant.
![]() GreenIPCore India |
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