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How Decades of research lead to new technology process : The FDSOI history and its future
Philippe Flatresse
Biography :
![](https://www.design-reuse-embedded.com/ipsocdays/ipsoc2017/portraits/Philippe Flatresse.jpg)
In year 2000, he joined STMicroelectronics Central R&D to deploy the SOI digital design activity. He has pioneered the partially and fully depleted SOI technologies and demonstrated their key advantages for low power high performance digital applications.
As design architect, he contributed to the development of products targeting high-growth areas such as ADAS, MCU and IoT applications. He was in charge of exploring the energy efficiency limits on multi-cores systems for ultra-low power processing by combining FD-SOI technology with body biasing, advanced low power techniques.
He has recently joined the business development team of SOITEC as expert for digital applications to participate to the worldwide of SOI technologies.
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