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Challenges of Porting ASIC IP Cores to FPGA: Tricky but Worthwhile!
Ettore Giliberti - Senior Staff Application Engineer - SmartDV Technologies
Biography :
Ettore Antonino Giliberti is an electronic engineer specializing in embedded systems, with several years of experience in SoC architecture, hardware/software co-design, and development; including hands-on work on FPGA and RISC-V based platforms. In his current role as Senior Staff Application Engineer at SmartDV Technologies, Ettore collaborates and supports customers in achieving success for their projects with SmartDV Design and Verification IPs.

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