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Porting ASIC IP Cores to FPGA: It's Not a Cakewalk!
Philipp Jacobsohn - Principal Application Engineer - SmartDV Technologies
Biography :
Philipp Jacobsohn is Senior Staff Applications Engineer at SmartDV, where he supports users of design IP and verification IP in North America and Europe. Beyond his work enabling the chip design success of SmartDV’s customers, Philipp is an avid technical writer with a keen interest in sharing the considerable knowledge he has cultivated over nearly 30 years in the semiconductor industry. Prior to joining the team at SmartDV in 2023, Philipp held a variety of engineering and field applications roles at J. Haugg, Synopsys, Synplicity, Epson Europe Electronics, Lattice Semiconductors, EBV Elektronik, and SEI-Elbatex. Philipp is based in Switzerland.

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