When : September 6th, 2023
Where: Evergreen Laurel Hotel Shanghai
No. 1136, Zu Chongzhi Road, Pudong New District
Pudong, 201203 Shanghai, China
Join D&R IP SoC China 23 !! A worldwide connected Event !!
Co-organized with:
D&R IP-SoC China 2023 Day is the unique worldwide event in China fully dedicated to IP (Silicon Intellectual Property) and IP based Electronic Systems.
IP-SoC providers, the seed of innovation in Electronic Industry, are invited to highlight their latest products and services and share their vision about the next innovation steps in the Electronic Industry.
IP consumers can view at a glance the latest Technology trends and exciting Innovative IP/SoC products. Through a global view, Electronic systems leaders may identify disruptive innovation leading to new market segment growth.
The event is a face to face meeting. In order to enhance the market attention the talk material and videos are posted concurrently on www.design-reuse-china.com and Youku.
Any question? Please
contact us
Registration and Exhibition installation opens at 7 am. Event closes at 6 pm.
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To join the event, you need to be registered.
If not yet done, Register Now !
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This year will also be the celebration year of D&R 25th anniversary
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Thus in a welcome session, gurus from various IP business fields will deliver their vision about the past quarter of century of IP business and give their prediction about the trends for the next decade.
- Introduction Session - Chair person : Dr Hao NI, SMIC
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9.00 am
Welcome
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Welcome to the IP soc community
Gabrièle Saucier
CEO & Founder
Design And Reuse
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The Current Situation of China's Integrated Circuit Industry and the Trend of IP Core Business
Bulu Xu
Vice Director
Shanghai Silicon Intellectual Property Exchange
with Tian-Shen Tang
General Consultant
Shanghai Silicon Intellectual Property Exchange
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10.00 am
Break
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10.30 am
Multi-Die Systems
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Chiplet and Die-to-Die (D2D) Interface Interoperability - How to Accelerate the Path to an Open Ecosystem
David Kuo
Sr. Director of Sales
Alphawave Semi
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The Future of UCIe for Multi-Die Systems
Roy Geng
Staff Application Engineer
Synopsys, Inc.
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11.15 am
Automotive
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Innosilicon Automotive Electronics Complete Solutions
Joey Shen
Product director,
Innosilicon Technology Ltd
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Interface IP - Build "intelligent neural network" for cars to escort intelligent driving
Thomas Huang
Product Marketing Director
AkroStar Technology Co., Ltd.
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Next-Generation Tensilica® Xtensa® LX8 Processor Platform
Wei Wang
AE Director
Cadence Design Systems, Inc.
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12.15 pm
Lunch Break
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- Session 1 - Chair person : Mark MA, Jiatao
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1.00 pm
RISC-V and Heterogeneous Computing
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It just keeps getting better: RISC-V Performance
Rocky Zhang
Principal Field Application Engineer, SiFive
Sifive, Inc.
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RISC-V processor IP product line
Alexander Kozlov
CTO
CloudBEAR
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World's First RISC-V big.LITTLE IP Subsystem
Jay Zhou
Starfive
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A unified hyper heterogeneous parallel computing ecosystem
Wenke Zhao
HSA BU G.M
Shanghai Silicon Intellectual Property Exchange
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2.20 pm
Break
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2.50 pm
Video and Imaging Solutions
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Bring High Quality Image to Smart Display with Super Resolution
Eric Mao
Sr. Director of Machine Learning Software
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
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An Innovative Video Standard – LCEVC (Low Complexity Enhancement Video Coding)
Yujing Wei
VP APAC
Allegro DVT
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Leveraging VESA Video Compression & MIPI DSI-2 for High-Performance Displays
Visually lossless video compression is essential for handling the growing bandwidth requirements of cutting-edge displays with higher resolutions, faster refresh rates, and greater pixel depths. This presentation will show designers how they can deve lop cutting-edge display products without compromising on display quality, battery life or cost using a combination of VESA video compression and MIPI DSI-2 technology.  ... 
Larry Lai
SMTS Field Applications Engineering
Rambus, Inc.
Online Only
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Video IP Solution for Now and Beyond
Summer Yoon
Technical PR Manager
Chips&Media, Inc.
Online Only
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3.30 pm
Break
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4.00 pm
Artificial Intelligence
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Interface IP Solution for LLMs AI SoC
Arno Li
AE Director
Cadence Design Systems, Inc.
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WhisperExtractor: Enabling μW Voice AI for Always-On Applications
Lida CAI
China FAE Manager
Dolphin Semiconductor
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Advancement in Multimedia interfaces servicing Edge AI markets
Kelvin Xu
Senior Product Management Manager
Synopsys, Inc.
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Neural-network Processing Unit hardware-software co-design IP
Luba Tang
CEO
Skymizer Inc.
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5.30 pm
END
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- Session 2 - Chair person : Bulu Xu, SSIPEX
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1.00 pm
Memory and Storage
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Stay Ahead of the Curve with Mobiveil's Memory, Storage and 5G IP Solutions
Ravi Thummarukudy
CEO
Mobiveil Inc.
Online Only
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LPDDR5/DDR5 Design Challenges & The Need for Flexibility
With the introduction of DDR5/LPDDR5, the latest DDR standards have surpassed beyond 5Gbps peak data rates and are rapidly approaching 10Gbps. However, DDR technologies' physical channels have remained relatively unchanged, exposing bandwidth limitat ions as data rates advance. At the same time, designing memory subsystem IPs that address a wide range of DRAM configurations, DRAM vendors, and platform options is becoming a real challenge. In this context, OPENEDGES' unique design flow and architecture prove to be a game-changer, effectively tackling these challenges and delivering the best-in-class customer experience. By offering platform flexibility, accelerated bring-up, and performance optimization, OPENEDGES' memory PHY integrates the proprietary microcontroller Programmable State Machine (PSM) network, which effectively addresses market needs. This multi-threaded PSM architecture meets real-time and speed capabilities but also provides full coverage verification capabilities from the design stage to ultra-fast in-silicon debugging and customization. ...
Richard Fung
CEO of The Six Semiconductor
OPENEDGES Technology, Inc.
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1.45 pm
Break
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2.15 pm
Interface Solution
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Three high-performance computing IPsolutions promote HPC chip innovation
Zachary Gao
VP/Technical director
Innosilicon Technology Ltd
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PCIe 6.0 and CXL 3.0 Applications and Solutions
Leon Zhang
Senior Product Management Manager
Synopsys, Inc.
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3.00 pm
Break
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3.30 pm
Monitoring and life cycle management
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Removing the Risk from RISC-V using the RISC-V Trace Standard
Processor trace gives developers access to critical insights and forensic capabilities to manage the risk of building embedded systems. Siemens, a lead technical contributor to the RISC-V trace specification, will present an overview of how processor trace is used to improve embedded software and applications and what is contained in the trace specification. We will also cover the Enhanced Trace Encoder from Tessent Embedded Analytics, the market-leading trace solution for RISC-V designed to meet the official RISC-V trace specification. ...
Yifan Li
Siemens - Tessent Embedded Analytics
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Essential IP for the Enablement of Silicon Lifecycle Management
Alex Yu
Sr Mgr, Solutions, EDAG, HW Analytics & Test
Synopsys, Inc.
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Second Source Management - the solution to securing product delivery
Fionn Liu
Thalia
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4.30 pm
Break
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4.45 pm
Security Solutions
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Cyber-physical security from chip to cloud with PQC (Post-Quantum Cryptography)
To ensure a fully managed and secure end-to-end cybersecurity solution, it is necessary to have full control over the product lifecycle and its security. Lifecycle management solutions cover the different stages of a product life: from IC design, se curity evaluation and certification, manufacturing to field deployment and then the decommissioning of devices that include those ICs. To ensure the security at all stages, Secure-IC offers a fully comprehensive solution that ensures product security is maintained, and that each stakeholder only has access to the relevant functions and services at each step of the product’s life. Especially for connected devices lifecycle management, a complete chip to cloud solution that enables provisioning, device management, device monitoring and device identity management, and offers differentiated security services for chip manufacturers and users can bring high additional value to the products. This approach comes in combination with having a scalable integrated Secure Element on the Embedded Edge device side. The challenge of lifecycle security management is also now impacted by the emergence of PQC (Post-Quantum Cryptography). Secure-IC will address those questions and propose an approach from chip security hardware solution to Chip-to-Cloud complete security solution. ...
Shengnan Wang
General Manager China
Secure-IC
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Empowering, Sharing and Securing: Digital Asset Management in SoC Design
Pei Li
Technical Expert, Large-scale and Secure Development
DragonSoft Digital Technology Co., Ltd.
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5.30 pm
END
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