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116 "RISC-V Processor" IP

1
ARC-V Processor IP

High-performance, Mid-range, and Ultra-low Power RISC-V Processor IP

Synopsys ARC-V Processor IP™ builds on the existing ARC processor offerings, while giving customers access to the ex...


2
ARC-V RHX-105 dual-issue, 32-bit multi-core RISC-V processor for real-time applications
The Synopsys ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-time performance is required. The cores offer outstanding perform...

3
ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
The Synopsys ARC-V™ RMX-500 series processors are optimized for use in embedded applications where power and performance efficiency are key concerns. The DSP enhanced implementation (RMX-500D) adds DS...

4
E2 Series - Power & area optimized: 2-3-stage, single-issue pipeline, as small as 13.5k gates
The E2 Series is highly optimized for area and power while still offering class-leading performance. Targeted for microcontroller and embedded devices, the E2 Core can be configured to be as small as ...

5
E3 Series - High performance 32-bit RISC-V Processor
The E3 Series is highly-integrated and feature-rich. It includes the E31 Core, which is the most widely deployed RISC-V core in the world. E3 embedded cores have a 5-6 stage pipeline, offering a great...

6
E7 Series - Ultra High Performance 32-bit RISC-V Embedded Processor
The E7 Series offers a 32-bit embedded processor targeting applications that require high performance while maintaining energy efficiency. The E7 core has a superscalar 8-stage in-order pipeline.

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S2 Series - 64-bit microcontroller highly-optimized for area, efficient performance, and simplified integration into 64-bit SoCs
The S2 Series is a 64-bit microcontroller highly-optimized for area, efficient performance, and simplified integration into 64-bit SoCs. The S2 core has the same efficient 2-stage or 3-stage pipeline ...

8
S5 Series - The S5 Series offers 64-bit RISC-V performance with 32-bit power and area
The S5 Series offers 64-bit RISC-V performance with 32-bit power and area. The S5 core has a 5-6 stage pipeline, offering a great balance between performance and efficiency.

9
S7 Series - Ultra High Performance 64-bit RISC-V Embedded Processor
The S7 Series offers a 64-bit embedded processor targeting high-performance, real-time applications that require 64-bit memory addressability. The S7 core has a superscalar 8-stage in-order pipeline.

10
U5 Series - 64-bit RISC-V Multi-Core Linux-Capable processor
The U5 Series features a RISC-V Linux-capable application processor that offers high performance with maximum efficiency. The U5 core has a 5-6 stage pipeline and supports virtual memory, enabling 64-...

11
U7 Series - High Performance 64-bit RISC-V Multi-Core Application Processor
The U7 Series features SiFive s highest-performance RISC-V Linux-capable application processor. The U7 core has a superscalar 8-stage pipeline with support for virtual memory, enabling the most demand...

12
32-bit Embedded RISC-V Functional Safety Processor
The EMSA5-FS is a processor core designed for functional safety. The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing th...

13
Low-Power Deeply Embedded RISC-V Processor
The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core.

14
NOEL-V Processor

The NOEL-V is a synthesizable VHDL model of a processor that implements the RISC-V architecture. The NOEL-V is designed for space applications: with its high-performance and fault-tolerant design, ...


15
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCN
The 32-bit N45 is an 8-stage superscalar processor that supports RISC-V specification, including (IMAFD) standard instructions, 16-bit compression instructions, and for user-level interrupts. It iss...

16
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP (DSP)
The 32-bit D45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, “P” Packed-SIMD/DSP instructi...

17
32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
The 32-bit A45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, “P” Packed-SIMD/DSP instructi...

18
64-Bit 8-stage superscalar processor that supports RISC-V specification, including GCN
The 64-bit NX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, and “N” for user-level inter...

19
64-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP and Linux
The 64-bit AX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, “P” Packed-SIMD/DSP instruct...

20
64-bit CPU with Modern RISC Architecture, MemBoost and PMA
The 64-bit AX27 is a 5-stage processor that supports the latest RISC-V specification, including G (IMAFD) standard instructions, C 16-bit compression instructions, P Packed-SIMD/DSP instructions, N fo...

21
64-bit CPU with RISC-V Vector Extension
The 64-bit NX27V is a vector processor with 5-stage scalar pipeline that supports the latest RISC-V specification, including the IMAFD standard instructions, "C" 16-bit compression instructi...

22
64-bit RISC-V Multicore Processor with 1024-bit Vector Extension
AndesCore™ AX45MPV 64-bit multicore CPU IP is an 8-stage superscalar processor with Vector Processing Unit (VPU) based on AndeStar™ V5 architecture. It supports RISC-V standard “G (IMA-FD)”, “C” 16-bi...

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AndesCore N25F-SE 32-bit CPU IP

AndesCore™ N25F-SE is a 32-bit CPU IP core that supports ISO 26262 ASIL B level functional safety for automotive applications. Approved based on the functional safety assignments of a Safety ...


24
Compact and Performance Efficiency 32-bit RISC-V Core
The AndesCore™ N225 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with small gate count, and some dual-issue ability. In addition to commonly us...

25
Compact High-Speed 32-bit CPU Core
AndesCore™ N25 is a 32-bit CPU IP core based on AndeStar™ V5m Instruction Set Architecture, which support RISC-V RV32IMAC extensions from the latest developments in computer architecture a...

26
Compact High-Speed 32-bit CPU Core with DSP
AndesCore™ D25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of delivering high per-MHz performance and operating at high frequencies,...

27
Compact High-Speed 32-bit CPU Core with DSP
Compact High-Speed 32-bit CPU Core with DSP

28
Compact High-Speed 64-bit CPU Core
NX25 is a 64-bit CPU IP core for applications with memory usage greater than 4G bytes, which is the bound of 32-bit processors. NX25 let high performance computing with very little silicon footprint achievable by its AndeStar® V5m Instruction Set Architecture.

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Compact High-Speed 64-bit CPU for Real-time and Linux Applications
AndesCore™ AX25 is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is tailored for high-performance embedded applications that needs to access address space over 4GB.

30
Compact, Secure and Performance Efficiency 32-bit RISC-V Core
AndesCore™ D23 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5/V5e architecture for embedded applications with small gate count, and some dual-issue ability. In addition to commonly use...

31
Compact, Secure and Performance Efficiency 32-bit RISC-V Core
AndesCore™ D23 is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5/V5e architecture for embedded applications with small gate count, and some dual-issue ability. In addition to commonly use...

32
icyflex-V Low-power 32-bit RISC-V processor
The icyflex-V 32-bit processor core is based on the RV32IMC open-instruction set architecture (ISA) defined by the RISC-V foundation and, as such, is supported by standard state-of-the-art development tools (both open-source and proprietary).

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RV12 - RISC-V Processor
A highly configurable single-issue, single-core RV32I, RV64I compliant RISC CPU intended for the embedded market. The RV12 implements a Harvard architecture for simultaneous instruction and data memory accesses.

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Superscalar Out-of-Order Execution Multicore Cluster
AndesCore™ AX65 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on AndeStar™ V5 architecture. It supports RISC-V standard “G (IMA-FD)”, “C” ...

35
Ultra Compact 32-bit RISC-V CPU Core
AndesCore™ N22 is a 32-bit 2-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications that require low energy consumption and small area.

36
32-bit High Performance RV32GC Single/Multicore RISC System-on-Chip
The CCRV32ST-S is a synthesisable Verilog model of a high performance 32-bit RV32GC System-on-Chip.

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32-bit High Performance Single/Multicore RISC Processor
The CC100-C processor is a synthesisable Verilog model of a high performance 32-bit RISC processor. The model is highly configurable, and particularly suitable for system-on-a-chip (SoC) designs. The ...

38
32-bit High Performance Single/Multicore RISC Processor with code compression
The CC150-C processor is a synthesisable Verilog model of a high performance 32-bit RISC processor. The model is highly configurable, and particularly suitable for system-on-a-chip (SoC) designs. The ...

39
32-bit High Performance Single/Multicore RISC System-on-Chip
The CC100-S is a synthesisable Verilog model of a high performance 32-bit RISC processor based System-on-Chip. The model is highly configurable and embeds a wide range of peripherals. The SoC can be e...

40
32-bit High Performance Single/Multicore RISC System-on-Chip with code compression
The CC150-S is a synthesisable Verilog model of a high performance 32-bit RISC processor based System-on-Chip. The model is highly configurable and embeds a wide range of peripherals. The SoC can be e...

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